Module: Mesa Branch: master Commit: 3ead528bbbbc59aa22e951c10cdeb1f7b54de87f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ead528bbbbc59aa22e951c10cdeb1f7b54de87f
Author: Dave Airlie <[email protected]> Date: Thu Sep 16 09:39:29 2010 +1000 r600g: use index min/max + index buffer offset. more prep work for fixing up buffer handling --- src/gallium/drivers/r600/eg_hw_states.c | 5 +++-- src/gallium/drivers/r600/r600_context.h | 2 ++ src/gallium/drivers/r600/r600_draw.c | 6 ++++++ src/gallium/drivers/r600/r600_hw_states.c | 6 +++--- 4 files changed, 14 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/r600/eg_hw_states.c b/src/gallium/drivers/r600/eg_hw_states.c index 684a9a3..ccc7895 100644 --- a/src/gallium/drivers/r600/eg_hw_states.c +++ b/src/gallium/drivers/r600/eg_hw_states.c @@ -889,6 +889,7 @@ static int eg_draw_vgt_init(struct r600_draw *draw, radeon_state_init(&draw->draw, rscreen->rw, R600_STATE_DRAW, 0, 0); draw->draw.states[EG_DRAW__VGT_NUM_INDICES] = draw->count; draw->draw.states[EG_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator; + draw->draw.states[EG_DRAW__VGT_DMA_BASE] = draw->index_buffer_offset; if (rbuffer) { draw->draw.bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); draw->draw.placement[0] = RADEON_GEM_DOMAIN_GTT; @@ -905,8 +906,8 @@ static int eg_draw_vgt_prim(struct r600_draw *draw, struct r600_screen *rscreen = rctx->screen; radeon_state_init(&draw->vgt, rscreen->rw, R600_STATE_VGT, 0, 0); draw->vgt.states[EG_VGT__VGT_PRIMITIVE_TYPE] = prim; - draw->vgt.states[EG_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF; - draw->vgt.states[EG_VGT__VGT_MIN_VTX_INDX] = 0x00000000; + draw->vgt.states[EG_VGT__VGT_MAX_VTX_INDX] = draw->max_index; + draw->vgt.states[EG_VGT__VGT_MIN_VTX_INDX] = draw->min_index; draw->vgt.states[EG_VGT__VGT_INDX_OFFSET] = draw->start; draw->vgt.states[EG_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type; draw->vgt.states[EG_VGT__VGT_PRIMITIVEID_EN] = 0x00000000; diff --git a/src/gallium/drivers/r600/r600_context.h b/src/gallium/drivers/r600/r600_context.h index 7366810..e89cab3 100644 --- a/src/gallium/drivers/r600/r600_context.h +++ b/src/gallium/drivers/r600/r600_context.h @@ -123,6 +123,8 @@ struct r600_draw { unsigned count; unsigned index_size; struct pipe_resource *index_buffer; + unsigned index_buffer_offset; + unsigned min_index, max_index; }; struct r600_context_hw_states { diff --git a/src/gallium/drivers/r600/r600_draw.c b/src/gallium/drivers/r600/r600_draw.c index 81ba584..17cc5a4 100644 --- a/src/gallium/drivers/r600/r600_draw.c +++ b/src/gallium/drivers/r600/r600_draw.c @@ -131,8 +131,11 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) draw.start = info->start; draw.count = info->count; if (info->indexed && rctx->index_buffer.buffer) { + draw.min_index = info->min_index; + draw.max_index = info->max_index; draw.index_size = rctx->index_buffer.index_size; draw.index_buffer = rctx->index_buffer.buffer; + draw.index_buffer_offset = rctx->index_buffer.offset; assert(rctx->index_buffer.offset % rctx->index_buffer.index_size == 0); @@ -142,6 +145,9 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) else { draw.index_size = 0; draw.index_buffer = NULL; + draw.min_index = 0; + draw.max_index = 0xffffff; + draw.index_buffer_offset = 0; } r = r600_draw_common(&draw); if (r) diff --git a/src/gallium/drivers/r600/r600_hw_states.c b/src/gallium/drivers/r600/r600_hw_states.c index b3ae6de..e188fb2 100644 --- a/src/gallium/drivers/r600/r600_hw_states.c +++ b/src/gallium/drivers/r600/r600_hw_states.c @@ -897,7 +897,7 @@ static int r600_draw_vgt_init(struct r600_draw *draw, radeon_state_init(&draw->draw, rscreen->rw, R600_STATE_DRAW, 0, 0); draw->draw.states[R600_DRAW__VGT_NUM_INDICES] = draw->count; draw->draw.states[R600_DRAW__VGT_DRAW_INITIATOR] = vgt_draw_initiator; - + draw->draw.states[R600_DRAW__VGT_DMA_BASE] = draw->index_buffer_offset; if (rbuffer) { draw->draw.bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo); draw->draw.placement[0] = RADEON_GEM_DOMAIN_GTT; @@ -914,8 +914,8 @@ static int r600_draw_vgt_prim(struct r600_draw *draw, struct r600_screen *rscreen = rctx->screen; radeon_state_init(&draw->vgt, rscreen->rw, R600_STATE_VGT, 0, 0); draw->vgt.states[R600_VGT__VGT_PRIMITIVE_TYPE] = prim; - draw->vgt.states[R600_VGT__VGT_MAX_VTX_INDX] = 0x00FFFFFF; - draw->vgt.states[R600_VGT__VGT_MIN_VTX_INDX] = 0x00000000; + draw->vgt.states[R600_VGT__VGT_MAX_VTX_INDX] = draw->max_index; + draw->vgt.states[R600_VGT__VGT_MIN_VTX_INDX] = draw->min_index; draw->vgt.states[R600_VGT__VGT_INDX_OFFSET] = draw->start; draw->vgt.states[R600_VGT__VGT_MULTI_PRIM_IB_RESET_INDX] = 0x00000000; draw->vgt.states[R600_VGT__VGT_DMA_INDEX_TYPE] = vgt_dma_index_type; _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
