Module: Mesa Branch: master Commit: 10b9e018ca4b37c66a6e0215d4551ed74b4981a6 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=10b9e018ca4b37c66a6e0215d4551ed74b4981a6
Author: Peter Clifton <[email protected]> Date: Sat Nov 6 09:23:06 2010 +0000 intel: Fix emit_linear_blit to use DWORD aligned width blits The width of the 2D blits used to copy the data is defined as a 16-bit signed integer, but the pitch must be DWORD aligned. Limit to an integral number of DWORDs, (1 << 15 - 4) rather than (1 << 15 -1). Fixes corruption to data uploaded with glBufferSubData. Signed-off-by: Peter Clifton <[email protected]> --- src/mesa/drivers/dri/intel/intel_blit.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index a74e217..7118898 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -483,8 +483,11 @@ intel_emit_linear_blit(struct intel_context *intel, /* Blits are in a different ringbuffer so we don't use them. */ assert(intel->gen < 6); - /* The pitch is a signed value. */ - pitch = MIN2(size, (1 << 15) - 1); + /* The pitch hits the GPU as a is a signed value, IN DWORDs. + * But we want width to match pitch. Max width is (1 << 15 - 1), + * rounding that down to the nearest DWORD is 1 << 15 - 4 + */ + pitch = MIN2(size, (1 << 15) - 4); height = size / pitch; ok = intelEmitCopyBlit(intel, 1, pitch, src_bo, src_offset, I915_TILING_NONE, _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
