Module: Mesa Branch: 7.10 Commit: 41d5dd4a6e10ae5ae6ac701cbb739fd89a449044 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=41d5dd4a6e10ae5ae6ac701cbb739fd89a449044
Author: Zou Nan hai <[email protected]> Date: Tue Mar 1 10:39:35 2011 +0800 i965: Align interleaved URB write length to 2 The BSpec says that interleave URB writes must be aligned, so this patch fulfills that requirement. This is half of patch 6c32477 from master. Signed-off-by: Zou Nan hai <[email protected]> Signed-off-by: Ian Romanick <[email protected]> --- src/mesa/drivers/dri/i965/brw_vs_emit.c | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 0411ce0..6ec6255 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1561,6 +1561,7 @@ static void emit_vertex_write( struct brw_vs_compile *c) int eot; GLuint len_vertex_header = 2; int next_mrf, i; + int msg_len; if (c->key.copy_edgeflag) { brw_MOV(p, @@ -1727,13 +1728,20 @@ static void emit_vertex_write( struct brw_vs_compile *c) eot = (c->first_overflow_output == 0); + msg_len = c->nr_outputs + 2 + len_vertex_header; + if (intel->gen >= 6) { + /* interleaved urb write message length for gen6 should be multiple of 2 */ + if ((msg_len % 2) != 0) + msg_len++; + } + brw_urb_WRITE(p, brw_null_reg(), /* dest */ 0, /* starting mrf reg nr */ c->r0, /* src */ 0, /* allocate */ 1, /* used */ - MIN2(c->nr_outputs + 1 + len_vertex_header, (BRW_MAX_MRF-1)), /* msg len */ + MIN2(msg_len - 1, (BRW_MAX_MRF - 1)), /* msg len */ 0, /* response len */ eot, /* eot */ eot, /* writes complete */ _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
