Module: Mesa Branch: master Commit: 0df2753ad21175d8914a8c2ca512cf79246c10fd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0df2753ad21175d8914a8c2ca512cf79246c10fd
Author: Tom Stellard <[email protected]> Date: Wed Sep 5 14:35:21 2012 -0400 radeon/llvm: Add register encoding for VCC Reviewed-by: Michel Dänzer <[email protected]> --- .../radeon/MCTargetDesc/SIMCCodeEmitter.cpp | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp b/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp index 438d2ac..ca4b579 100644 --- a/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/src/gallium/drivers/radeon/MCTargetDesc/SIMCCodeEmitter.cpp @@ -280,6 +280,7 @@ unsigned SIMCCodeEmitter::getEncodingBytes(const MCInst &MI) const { unsigned SIMCCodeEmitter::getRegBinaryCode(unsigned reg) const { switch (reg) { + case AMDGPU::VCC: return 106; case AMDGPU::M0: return 124; case AMDGPU::EXEC: return 126; case AMDGPU::EXEC_LO: return 126; _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
