Mesa (master): radeonsi: correct texture memory size for Z32F_S8X24

[Michel Dänzer]

Module: Mesa
Branch: master
Commit: 39b56afaa238f3f5aadf562a6fb9786cad1105b8
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=39b56afaa238f3f5aadf562a6fb9786cad1105b8

Author: Marek Olšák <mar...@gmail.com>
Date:   Tue Nov 13 18:01:53 2012 +0100

radeonsi: correct texture memory size for Z32F_S8X24

[ Cherry-picked from r600g commit ea72351a919c594e7f40e901dca42aebb866f8a6 ]

---

 src/gallium/drivers/radeonsi/r600_texture.c |   22 +++++++++++++++-------
 1 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/r600_texture.c 
b/src/gallium/drivers/radeonsi/r600_texture.c
index 3050be7..64d4b0e 100644
--- a/src/gallium/drivers/radeonsi/r600_texture.c
+++ b/src/gallium/drivers/radeonsi/r600_texture.c
@@ -73,7 +73,8 @@ static unsigned r600_texture_get_offset(struct 
r600_resource_texture *rtex,
               layer * rtex->surface.level[level].slice_size;
 }
 
-static int r600_init_surface(struct radeon_surface *surface,
+static int r600_init_surface(struct r600_screen *rscreen,
+                            struct radeon_surface *surface,
                             const struct pipe_resource *ptex,
                             unsigned array_mode,
                             bool is_transfer, bool is_flushed_depth)
@@ -93,11 +94,18 @@ static int r600_init_surface(struct radeon_surface *surface,
        surface->blk_d = 1;
        surface->array_size = 1;
        surface->last_level = ptex->last_level;
-       surface->bpe = util_format_get_blocksize(ptex->format);
-       /* align byte per element on dword */
-       if (surface->bpe == 3) {
-               surface->bpe = 4;
+
+       if (!is_transfer && !is_flushed_depth &&
+           ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
+               surface->bpe = 4; /* stencil is allocated separately on 
evergreen */
+       } else {
+               surface->bpe = util_format_get_blocksize(ptex->format);
+               /* align byte per element on dword */
+               if (surface->bpe == 3) {
+                       surface->bpe = 4;
+               }
        }
+
        surface->nsamples = 1;
        surface->flags = 0;
        switch (array_mode) {
@@ -520,7 +528,7 @@ struct pipe_resource *si_texture_create(struct pipe_screen 
*screen,
        }
 #endif
 
-       r = r600_init_surface(&surface, templ, array_mode,
+       r = r600_init_surface(rscreen, &surface, templ, array_mode,
                              templ->flags & R600_RESOURCE_FLAG_TRANSFER,
                              templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH);
        if (r) {
@@ -603,7 +611,7 @@ struct pipe_resource *si_texture_from_handle(struct 
pipe_screen *screen,
        else
                array_mode = V_009910_ARRAY_LINEAR_ALIGNED;
 
-       r = r600_init_surface(&surface, templ, array_mode, false, false);
+       r = r600_init_surface(rscreen, &surface, templ, array_mode, false, 
false);
        if (r) {
                return NULL;
        }

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