Module: Mesa Branch: master Commit: a58bf9d8f9c683b98aee4759533c997557b2c848 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a58bf9d8f9c683b98aee4759533c997557b2c848
Author: Marek Olšák <[email protected]> Date: Sat Dec 22 19:05:37 2012 +0100 r600g: rename GPU_FLUSH -> INVAL_READ_CACHES because that's what it does. --- src/gallium/drivers/r600/evergreen_compute.c | 6 +++--- .../drivers/r600/evergreen_compute_internal.c | 4 ++-- src/gallium/drivers/r600/r600.h | 2 +- src/gallium/drivers/r600/r600_hw_context.c | 2 +- src/gallium/drivers/r600/r600_state_common.c | 8 ++++---- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index ea75d80..8d3050b 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -98,7 +98,7 @@ static void evergreen_cs_set_vertex_buffer( /* The vertex instructions in the compute shaders use the texture cache, * so we need to invalidate it. */ - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; state->enabled_mask |= 1 << vb_index; state->dirty_mask |= 1 << vb_index; state->atom.dirty = true; @@ -409,7 +409,7 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout, /* XXX evergreen_flush_emit() hardcodes the CP_COHER_SIZE to 0xffffffff */ - ctx->flags |= R600_CONTEXT_GPU_FLUSH; + ctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; r600_flush_emit(ctx); #if 0 @@ -468,7 +468,7 @@ void evergreen_emit_cs_shader( r600_write_value(cs, r600_context_bo_reloc(rctx, kernel->code_bo, RADEON_USAGE_READ)); - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; } static void evergreen_launch_grid( diff --git a/src/gallium/drivers/r600/evergreen_compute_internal.c b/src/gallium/drivers/r600/evergreen_compute_internal.c index 94f556f..1654ab0 100644 --- a/src/gallium/drivers/r600/evergreen_compute_internal.c +++ b/src/gallium/drivers/r600/evergreen_compute_internal.c @@ -545,7 +545,7 @@ void evergreen_set_tex_resource( util_format_get_blockwidth(tmp->resource.b.b.format) * view->base.texture->width0*height*depth; - pipe->ctx->flags |= R600_CONTEXT_GPU_FLUSH; + pipe->ctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; evergreen_emit_force_reloc(res); evergreen_emit_force_reloc(res); @@ -604,7 +604,7 @@ void evergreen_set_const_cache( res->usage = RADEON_USAGE_READ; res->coher_bo_size = size; - pipe->ctx->flags |= R600_CONTEXT_GPU_FLUSH; + pipe->ctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; } struct r600_resource* r600_compute_buffer_alloc_vram( diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index c351982..b6f7d03 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -182,7 +182,7 @@ struct r600_so_target { unsigned so_index; }; -#define R600_CONTEXT_GPU_FLUSH (1 << 0) +#define R600_CONTEXT_INVAL_READ_CACHES (1 << 0) #define R600_CONTEXT_STREAMOUT_FLUSH (1 << 1) #define R600_CONTEXT_WAIT_IDLE (1 << 2) #define R600_CONTEXT_FLUSH_AND_INV (1 << 3) diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 486bc7a..163917e 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -650,7 +650,7 @@ void r600_flush_emit(struct r600_context *rctx) } } - if (rctx->flags & R600_CONTEXT_GPU_FLUSH) { + if (rctx->flags & R600_CONTEXT_INVAL_READ_CACHES) { cp_coher_cntl |= S_0085F0_VC_ACTION_ENA(1) | S_0085F0_TC_ACTION_ENA(1) | S_0085F0_FULL_CACHE_ENA(1); diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index f8b64cc..bbcfc4f 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -89,7 +89,7 @@ static void r600_texture_barrier(struct pipe_context *ctx) struct r600_context *rctx = (struct r600_context *)ctx; rctx->flags |= R600_CONTEXT_WAIT_IDLE; - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; rctx->flags |= R600_CONTEXT_FLUSH_AND_INV; } @@ -488,7 +488,7 @@ static void r600_set_index_buffer(struct pipe_context *ctx, void r600_vertex_buffers_dirty(struct r600_context *rctx) { if (rctx->vertex_buffer_state.dirty_mask) { - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; rctx->vertex_buffer_state.atom.num_dw = (rctx->chip_class >= EVERGREEN ? 12 : 11) * util_bitcount(rctx->vertex_buffer_state.dirty_mask); rctx->vertex_buffer_state.atom.dirty = true; @@ -544,7 +544,7 @@ void r600_sampler_views_dirty(struct r600_context *rctx, struct r600_samplerview_state *state) { if (state->dirty_mask) { - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; state->atom.num_dw = (rctx->chip_class >= EVERGREEN ? 14 : 13) * util_bitcount(state->dirty_mask); state->atom.dirty = true; @@ -886,7 +886,7 @@ static void r600_delete_vs_state(struct pipe_context *ctx, void *state) void r600_constant_buffers_dirty(struct r600_context *rctx, struct r600_constbuf_state *state) { if (state->dirty_mask) { - rctx->flags |= R600_CONTEXT_GPU_FLUSH; + rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES; state->atom.num_dw = rctx->chip_class >= EVERGREEN ? util_bitcount(state->dirty_mask)*20 : util_bitcount(state->dirty_mask)*19; state->atom.dirty = true; _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
