Module: Mesa Branch: master Commit: 3f09e528d59127a2552ea4802937c39e87c3288e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f09e528d59127a2552ea4802937c39e87c3288e
Author: Eric Anholt <[email protected]> Date: Mon May 6 14:14:39 2013 -0700 i965: Use Y-tiled blits to untile for cached mappings of miptrees. Fixes a regression in firefox's unaccelerated compositing path for WebGL with the introduction of Y tiling. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64213 Reviewed-by: Kenneth Graunke <[email protected]> --- src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 8970228..7f4cb4a 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -1903,7 +1903,8 @@ intel_miptree_map_singlesample(struct intel_context *intel, else if (intel->has_llc && !(mode & GL_MAP_WRITE_BIT) && !mt->compressed && - mt->region->tiling == I915_TILING_X && + (mt->region->tiling == I915_TILING_X || + (intel->gen >= 6 && mt->region->tiling == I915_TILING_Y)) && mt->region->pitch < 32768) { intel_miptree_map_blit(intel, mt, map, level, slice); } else if (mt->region->tiling != I915_TILING_NONE && _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
