Module: Mesa Branch: master Commit: 4e95a099373c7e3f3f5f0f2854bc4eb582724a0a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e95a099373c7e3f3f5f0f2854bc4eb582724a0a
Author: Kenneth Graunke <[email protected]> Date: Tue Dec 10 01:21:54 2013 -0800 i965: Disassemble UV types, not UB types. UB types have never been supported as immediates. On Gen4-5, register encoding 4 is "Reserved." On Gen6+, it means UV. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> --- src/mesa/drivers/dri/i965/brw_disasm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index ade7e7f..4c435be 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -900,8 +900,8 @@ static int imm (FILE *file, unsigned type, struct brw_instruction *inst) { case BRW_REGISTER_TYPE_W: format (file, "%dW", (int16_t) inst->bits3.d); break; - case BRW_REGISTER_TYPE_UB: - format (file, "0x%02xUB", (int8_t) inst->bits3.ud); + case BRW_REGISTER_TYPE_UV: + format (file, "0x%08xUV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_VF: format (file, "Vector Float"); _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
