Module: Mesa Branch: master Commit: 670418740fc763f0272b799ea999cd3ff69b1218 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=670418740fc763f0272b799ea999cd3ff69b1218
Author: Rob Clark <[email protected]> Date: Wed May 14 12:46:42 2014 -0400 freedreno/a3xx: fix write to bogus register The loops for updating the multiple packed fields in SP_VS_OUT[] and SP_VS_VPC_DST[] will zero out one register beyond the last that on required. Which is normally not a problem (and is kinda convenient when looking at cmdstream dumps) unless we have maximum (16) varyings. Fix loop termination condition so that this does not happen. Signed-off-by: Rob Clark <[email protected]> --- src/gallium/drivers/freedreno/a3xx/fd3_program.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c index 2e2a66d..17f3dcf 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c @@ -406,7 +406,7 @@ fd3_program_emit(struct fd_ringbuffer *ring, A3XX_SP_VS_PARAM_REG_PSIZEREGID(psize_regid) | A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(align(fp->total_in, 4) / 4)); - for (i = 0, j = -1; j < (int)fp->inputs_count; i++) { + for (i = 0, j = -1; (i < 8) && (j < (int)fp->inputs_count); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A3XX_SP_VS_OUT_REG(i), 1); @@ -428,7 +428,7 @@ fd3_program_emit(struct fd_ringbuffer *ring, OUT_RING(ring, reg); } - for (i = 0, j = -1; j < (int)fp->inputs_count; i++) { + for (i = 0, j = -1; (i < 4) && (j < (int)fp->inputs_count); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A3XX_SP_VS_VPC_DST_REG(i), 1); _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
