Module: Mesa
Branch: master
Commit: e10311be9f61230de7f06e9fb30834835ba3677d
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e10311be9f61230de7f06e9fb30834835ba3677d

Author: Kenneth Graunke <[email protected]>
Date:   Fri May  9 22:22:24 2014 -0700

i965: Drop SINT workaround for CMS layout on Broadwell.

According to the documentation, we don't need this SINT workaround on
Broadwell.  (Or at least, it doesn't mention that we need it.)

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |    4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 4c71e41..58e09b7 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -87,9 +87,7 @@ compute_msaa_layout(struct brw_context *brw, mesa_format 
format, GLenum target)
        * would require converting between CMS and UMS MSAA layouts on the fly,
        * which is expensive.
        */
-      if (_mesa_get_format_datatype(format) == GL_INT) {
-         /* TODO: is this workaround needed for future chipsets? */
-         assert(brw->gen == 7);
+      if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) {
          return INTEL_MSAA_LAYOUT_UMS;
       } else {
          return INTEL_MSAA_LAYOUT_CMS;

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