Module: Mesa Branch: 10.4 Commit: fb3f7c0bc599f705dec0024188f1cb5deed93495 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb3f7c0bc599f705dec0024188f1cb5deed93495
Author: Cody Northrop <[email protected]> Date: Mon Sep 15 16:14:20 2014 -0600 i965: Require pixel alignment for GPU copy blit The blitter will start at a pixel's natural alignment. For PBOs, if the provided offset if not aligned, bits will get dropped. This change adds offset alignment check for src and dst, kicking back if the requirements are not met. The change is based on following verbiage from BSPEC: Color pixel sizes supported are 8, 16, and 32 bits per pixel (bpp). All pixels are naturally aligned. Found in the following locations: page 35 of intel-gfx-prm-osrc-hsw-blitter.pdf page 29 of ivb_ihd_os_vol1_part4.pdf page 29 of snb_ihd_os_vol1_part5.pdf This behavior was observed with Steam Big Picture rendering incorrect icon colors. The fix has been tested on Ubuntu and SteamOS on Haswell. Signed-off-by: Cody Northrop <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83908 Reviewed-by: Neil Roberts <[email protected]> (cherry picked from commit 83e8bb5b1a50c0105b642d559999f07fa64a982f) Nominated-by: Matt Turner <[email protected]> --- src/mesa/drivers/dri/i915/intel_blit.c | 5 +++-- src/mesa/drivers/dri/i965/intel_blit.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c index d4e269d..9a68625 100644 --- a/src/mesa/drivers/dri/i915/intel_blit.c +++ b/src/mesa/drivers/dri/i915/intel_blit.c @@ -271,9 +271,10 @@ intelEmitCopyBlit(struct intel_context *intel, dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); /* Blit pitch must be dword-aligned. Otherwise, the hardware appears to drop - * the low bits. + * the low bits. Offsets must be naturally aligned. */ - if (src_pitch % 4 != 0 || dst_pitch % 4 != 0) + if (src_pitch % 4 != 0 || src_offset % cpp != 0 || + dst_pitch % 4 != 0 || dst_offset % cpp != 0) return false; /* For big formats (such as floating point), do the copy using 16 or 32bpp diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 73ab488..25ca194 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -342,9 +342,10 @@ intelEmitCopyBlit(struct brw_context *brw, dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); /* Blit pitch must be dword-aligned. Otherwise, the hardware appears to drop - * the low bits. + * the low bits. Offsets must be naturally aligned. */ - if (src_pitch % 4 != 0 || dst_pitch % 4 != 0) + if (src_pitch % 4 != 0 || src_offset % cpp != 0 || + dst_pitch % 4 != 0 || dst_offset % cpp != 0) return false; /* For big formats (such as floating point), do the copy using 16 or 32bpp _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
