Module: Mesa
Branch: master
Commit: 354206f407fffd5f0b553dcbcc46b178d0b22c47
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=354206f407fffd5f0b553dcbcc46b178d0b22c47

Author: Ilia Mirkin <[email protected]>
Date:   Mon Jan  5 12:44:10 2015 -0500

nv50/ir: change the way float face is returned

The old way made it impossible for the optimizer to reason about what
was going on. The new way is the same number of instructions (the neg
gets folded into the cvt) but enables the optimizer to be cleverer if
comparing to a constant (most common case). [The optimizer is presently
not sufficiently clever to work this out, but it could relatively easily
be made to be. The old way would have required significant complexity to
work out.]

Signed-off-by: Ilia Mirkin <[email protected]>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp |    5 +++--
 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp |    5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 0d7612e..1ad0860 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -1094,8 +1094,9 @@ NV50LoweringPreSSA::handleRDSV(Instruction *i)
    case SV_FACE:
       bld.mkInterp(NV50_IR_INTERP_FLAT, def, addr, NULL);
       if (i->dType == TYPE_F32) {
-         bld.mkOp2(OP_AND, TYPE_U32, def, def, bld.mkImm(0x80000000));
-         bld.mkOp2(OP_XOR, TYPE_U32, def, def, bld.mkImm(0xbf800000));
+         bld.mkOp2(OP_OR, TYPE_U32, def, def, bld.mkImm(0x00000001));
+         bld.mkOp1(OP_NEG, TYPE_S32, def, def);
+         bld.mkCvt(OP_CVT, TYPE_F32, def, TYPE_S32, def);
       }
       break;
    case SV_NCTAID:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index c234131..5dfb777 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -1454,8 +1454,9 @@ NVC0LoweringPass::handleRDSV(Instruction *i)
       Value *face = i->getDef(0);
       bld.mkInterp(NV50_IR_INTERP_FLAT, face, addr, NULL);
       if (i->dType == TYPE_F32) {
-         bld.mkOp2(OP_AND, TYPE_U32, face, face, bld.mkImm(0x80000000));
-         bld.mkOp2(OP_XOR, TYPE_U32, face, face, bld.mkImm(0xbf800000));
+         bld.mkOp2(OP_OR, TYPE_U32, face, face, bld.mkImm(0x00000001));
+         bld.mkOp1(OP_NEG, TYPE_S32, face, face);
+         bld.mkCvt(OP_CVT, TYPE_F32, face, TYPE_S32, face);
       }
    }
       break;

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