Module: Mesa
Branch: master
Commit: 73d106822e3d0e851ef1308afff7490007b1af8c
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73d106822e3d0e851ef1308afff7490007b1af8c

Author: Kenneth Graunke <[email protected]>
Date:   Sun Mar 29 03:45:16 2015 -0700

i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.

This allows those formats to work with the meta PBO upload path.

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>

---

 src/mesa/drivers/dri/i965/brw_surface_formats.c |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 7261c01..7524ad9 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -582,6 +582,14 @@ brw_init_surface_formats(struct brw_context *brw)
       case BRW_SURFACEFORMAT_L16_FLOAT:
         render = BRW_SURFACEFORMAT_R16_FLOAT;
         break;
+      case BRW_SURFACEFORMAT_I8_UNORM:
+      case BRW_SURFACEFORMAT_L8_UNORM:
+         render = BRW_SURFACEFORMAT_R8_UNORM;
+         break;
+      case BRW_SURFACEFORMAT_I16_UNORM:
+      case BRW_SURFACEFORMAT_L16_UNORM:
+         render = BRW_SURFACEFORMAT_R16_UNORM;
+         break;
       case BRW_SURFACEFORMAT_B8G8R8X8_UNORM:
         /* XRGB is handled as ARGB because the chips in this family
          * cannot render to XRGB targets.  This means that we have to

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