Module: Mesa Branch: master Commit: d4d27361499cac73da4716b571519ecb71cef551 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4d27361499cac73da4716b571519ecb71cef551
Author: Eric Anholt <[email protected]> Date: Mon Jun 15 17:47:12 2015 -0700 vc4: Swap around which src we spill to ra31/rb31. I wanted to assert that src1 came from a non-unspilled register in shader validation, and this easily gets us that. And, as a bonus: total instructions in shared programs: 93347 -> 92723 (-0.67%) instructions in affected programs: 60524 -> 59900 (-1.03%) --- src/gallium/drivers/vc4/vc4_qpu_emit.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c index 577eb92..99afe4b 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_emit.c +++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c @@ -117,11 +117,11 @@ fixup_raddr_conflict(struct vc4_compile *c, return; if (mux0 == QPU_MUX_A) { - queue(c, qpu_a_MOV(qpu_rb(31), *src1)); - *src1 = qpu_rb(31); + queue(c, qpu_a_MOV(qpu_rb(31), *src0)); + *src0 = qpu_rb(31); } else { - queue(c, qpu_a_MOV(qpu_ra(31), *src1)); - *src1 = qpu_ra(31); + queue(c, qpu_a_MOV(qpu_ra(31), *src0)); + *src0 = qpu_ra(31); } } _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
