Module: Mesa
Branch: master
Commit: 80fc9c01dfe4cbbcf1c6b101fcdfdecbda63131e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=80fc9c01dfe4cbbcf1c6b101fcdfdecbda63131e
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Jun 30 17:04:52 2015 -0700
i965/fs: Use the builder directly for the gen6 interpolation add(32)
Now that we can create builders with a bigger width than their parent as
long as it's exec_all, we don't need to create the instruction manually.
Reviewed-by: Francisco Jerez <curroje...@riseup.net>
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 79ebb2d..94d6a58 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1358,12 +1358,11 @@ fs_visitor::emit_interpolation_setup_gen6()
*/
fs_reg int_pixel_xy(GRF, alloc.allocate(dispatch_width / 8),
BRW_REGISTER_TYPE_UW);
- fs_inst *add =
- new (mem_ctx) fs_inst(BRW_OPCODE_ADD, dispatch_width * 2,
- int_pixel_xy,
- fs_reg(stride(suboffset(g1_uw, 4), 1, 4, 0)),
- fs_reg(brw_imm_v(0x11001010)));
- abld.exec_all().emit(add);
+
+ const fs_builder dbld = abld.exec_all().group(dispatch_width * 2, 0);
+ dbld.ADD(int_pixel_xy,
+ fs_reg(stride(suboffset(g1_uw, 4), 1, 4, 0)),
+ fs_reg(brw_imm_v(0x11001010)));
this->pixel_x = vgrf(glsl_type::float_type);
this->pixel_y = vgrf(glsl_type::float_type);
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