Module: Mesa Branch: master Commit: 6206da736c84c4f7316ab586c886b4865fda8805 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6206da736c84c4f7316ab586c886b4865fda8805
Author: Rob Clark <[email protected]> Date: Thu Oct 15 16:22:23 2015 -0400 freedreno/a3xx: cache-flush is needed after MEM_WRITE Otherwise the mem2gmem blit would see potentially bogus texture coordinates. Fixes an issue that shows up with glamor. CC: "11.0" <[email protected]> Signed-off-by: Rob Clark <[email protected]> --- src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 6 +----- src/gallium/drivers/freedreno/a3xx/fd3_emit.h | 11 +++++++++++ src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 2 ++ 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c index 6153d92..411f5b7 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c @@ -798,11 +798,7 @@ fd3_emit_restore(struct fd_context *ctx) OUT_RING(ring, A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(0) | A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(0)); - OUT_PKT0(ring, REG_A3XX_UCHE_CACHE_INVALIDATE0_REG, 2); - OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(0)); - OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(0) | - A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(INVALIDATE) | - A3XX_UCHE_CACHE_INVALIDATE1_REG_ENTIRE_CACHE); + fd3_emit_cache_flush(ctx, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_CLIP_CNTL, 1); OUT_RING(ring, 0x00000000); /* GRAS_CL_CLIP_CNTL */ diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h index 7956547..42483f6 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.h +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.h @@ -90,4 +90,15 @@ void fd3_emit_restore(struct fd_context *ctx); void fd3_emit_init(struct pipe_context *pctx); +static inline void +fd3_emit_cache_flush(struct fd_context *ctx, struct fd_ringbuffer *ring) +{ + fd_wfi(ctx, ring); + OUT_PKT0(ring, REG_A3XX_UCHE_CACHE_INVALIDATE0_REG, 2); + OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(0)); + OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(0) | + A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(INVALIDATE) | + A3XX_UCHE_CACHE_INVALIDATE1_REG_ENTIRE_CACHE); +} + #endif /* FD3_EMIT_H */ diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c index 9a5b45e..21fb59e 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c @@ -558,6 +558,8 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile) OUT_RING(ring, fui(x1)); OUT_RING(ring, fui(y1)); + fd3_emit_cache_flush(ctx, ring); + for (i = 0; i < 4; i++) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) | _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
