Module: Mesa
Branch: master
Commit: cef22f3490f9809a6e77949f73448efac23be7ee
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cef22f3490f9809a6e77949f73448efac23be7ee
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date: Fri Oct 9 16:10:19 2015 +0200
nvc0: read MP counters of all GPCs on Fermi
When a card has more than one GPC, the grid used by the compute
kernel which reads MP performance counters seems to be too small.
The consequence is that the kernel is not launched on all TPCs.
Increasing the grid size using the number of GPCs now launches
enough blocks and we can read MP performance counters of all TPCs.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
index 8eb3b3e..0b4a36f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
@@ -528,7 +528,7 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct
nvc0_hw_query *hq)
uint32_t mask;
uint32_t input[3];
const uint block[3] = { 32, is_nve4 ? 4 : 1, 1 };
- const uint grid[3] = { screen->mp_count, 1, 1 };
+ const uint grid[3] = { screen->mp_count, screen->gpc_count, 1 };
unsigned c;
if (unlikely(!screen->pm.prog)) {
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