Module: Mesa
Branch: master
Commit: bcdf664682ea027b38e3c610e4e038956b1bb0de
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcdf664682ea027b38e3c610e4e038956b1bb0de

Author: Matt Turner <[email protected]>
Date:   Mon Oct 26 04:09:35 2015 -0700

i965: Test fixed_hw_reg.file against BRW_IMMEDIATE_VALUE, not IMM.

No functional change, since they were both 3, but BRW_IMMEDIATE_VALUE is
the hardware value and IMM was the IR value -- and you can see that
BRW_IMMEDIATE_VALUE was correctly used in the context of this patch.

Reviewed-by: Kenneth Graunke <[email protected]>

---

 src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp 
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index b710c60..cd1f21e 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -822,7 +822,7 @@ fs_instruction_scheduler::calculate_deps()
                     inst->src[i].file != IMM &&
                     inst->src[i].file != UNIFORM &&
                     (inst->src[i].file != HW_REG ||
-                     inst->src[i].fixed_hw_reg.file != IMM)) {
+                     inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) {
             assert(inst->src[i].file != MRF);
             add_barrier_deps(n);
          }
@@ -951,7 +951,7 @@ fs_instruction_scheduler::calculate_deps()
                     inst->src[i].file != IMM &&
                     inst->src[i].file != UNIFORM &&
                     (inst->src[i].file != HW_REG ||
-                     inst->src[i].fixed_hw_reg.file != IMM)) {
+                     inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) {
             assert(inst->src[i].file != MRF);
             add_barrier_deps(n);
          }
@@ -1080,7 +1080,7 @@ vec4_instruction_scheduler::calculate_deps()
                     inst->src[i].file != IMM &&
                     inst->src[i].file != UNIFORM &&
                     (inst->src[i].file != HW_REG ||
-                     inst->src[i].fixed_hw_reg.file != IMM)) {
+                     inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) {
             /* No reads from MRF, and ATTR is already translated away */
             assert(inst->src[i].file != MRF &&
                    inst->src[i].file != ATTR);
@@ -1177,7 +1177,7 @@ vec4_instruction_scheduler::calculate_deps()
                     inst->src[i].file != IMM &&
                     inst->src[i].file != UNIFORM &&
                     (inst->src[i].file != HW_REG ||
-                     inst->src[i].fixed_hw_reg.file != IMM)) {
+                     inst->src[i].fixed_hw_reg.file != BRW_IMMEDIATE_VALUE)) {
             assert(inst->src[i].file != MRF &&
                    inst->src[i].file != ATTR);
             add_barrier_deps(n);

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