Module: Mesa Branch: master Commit: 437d7b611972c52fac32cb54038d3b278f66fd5a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=437d7b611972c52fac32cb54038d3b278f66fd5a
Author: Eric Anholt <[email protected]> Date: Mon Nov 9 09:12:20 2015 -0800 vc4: Avoid loading undefined (newly-allocated) FBO contents. Since X has undefined contents in new pixmaps, it will allocate new textures for an FBO and draw to them without an explicit clear. For VC4, it's much faster to emit a clear than the load of the actual undefined memory contents, so just do that instead. --- src/gallium/drivers/vc4/vc4_state.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c index 7317695..a234ce5 100644 --- a/src/gallium/drivers/vc4/vc4_state.c +++ b/src/gallium/drivers/vc4/vc4_state.c @@ -420,6 +420,23 @@ vc4_set_framebuffer_state(struct pipe_context *pctx, cso->width = framebuffer->width; cso->height = framebuffer->height; + /* If we're binding to uninitialized buffers, no need to load their + * contents before drawing.. + */ + if (cso->cbufs[0]) { + struct vc4_resource *rsc = + vc4_resource(cso->cbufs[0]->texture); + if (!rsc->writes) + vc4->cleared |= PIPE_CLEAR_COLOR0; + } + + if (cso->zsbuf) { + struct vc4_resource *rsc = + vc4_resource(cso->zsbuf->texture); + if (!rsc->writes) + vc4->cleared |= PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL; + } + /* Nonzero texture mipmap levels are laid out as if they were in * power-of-two-sized spaces. The renderbuffer config infers its * stride from the width parameter, so we need to configure our _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
