Module: Mesa Branch: master Commit: 44260d908062a4771c30ab635dd527f4266dbaec URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44260d908062a4771c30ab635dd527f4266dbaec
Author: Ilia Mirkin <[email protected]> Date: Tue Dec 8 18:46:34 2015 -0500 nv50/ir: prefer to color mad def and src2 with the same color This allows us to use the short encoding, and potentially fold immediates in later on. total instructions in shared programs : 6379731 -> 6367861 (-0.19%) total gprs used in shared programs : 728502 -> 728683 (0.02%) total local used in shared programs : 9904 -> 9904 (0.00%) total bytes used in shared programs : 44661008 -> 44154976 (-1.13%) local gpr inst bytes helped 0 51 7267 20306 hurt 0 232 125 274 Signed-off-by: Ilia Mirkin <[email protected]> --- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp index a7d8177..b32bc13 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp @@ -1465,6 +1465,20 @@ GCRA::allocateRegisters(ArrayList& insns) if (lval) { nodes[i].init(regs, lval); RIG.insert(&nodes[i]); + + if (lval->inFile(FILE_GPR) && lval->defs.size() > 0 && + prog->getTarget()->getChipset() < 0xc0) { + Instruction *insn = lval->getInsn(); + if (insn->op == OP_MAD || insn->op == OP_SAD) + // Short encoding only possible if they're all GPRs, no need to + // affect them otherwise. + if (insn->flagsDef < 0 && + isFloatType(insn->dType) && + insn->src(0).getFile() == FILE_GPR && + insn->src(1).getFile() == FILE_GPR && + insn->src(2).getFile() == FILE_GPR) + nodes[i].addRegPreference(getNode(insn->getSrc(2)->asLValue())); + } } } _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
