Module: Mesa Branch: master Commit: 50c2713726f007b988502ed5e7073fae11409853 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=50c2713726f007b988502ed5e7073fae11409853
Author: Francisco Jerez <[email protected]> Date: Thu Sep 3 17:08:16 2015 +0300 i965: Adjust gen check in can_do_pipelined_register_writes Allow for pipelined register writes for gen < 7. v2: * Split from another patch and adjust comment (jljusten) Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> --- src/mesa/drivers/dri/i965/intel_extensions.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index bec318f..8a1ec32 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -38,8 +38,11 @@ static bool can_do_pipelined_register_writes(struct brw_context *brw) { - /* Supposedly, Broadwell just works. */ - if (brw->gen >= 8) + /** + * gen >= 8 specifically allows these writes. gen <= 6 also + * doesn't block them. + */ + if (brw->gen != 7) return true; static int result = -1; _______________________________________________ mesa-commit mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/mesa-commit
