URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8bac2f99b5807f24b0ed4cdaad8ad09af149ff1
Author: Oded Gabbay <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
configura.ac: fix test for SSE4.1 assembler support
This patch modifies the SSE4.1 test in configure.ac to use a global
variable to initialize vector variables. In addition, we now return the
value of the computation instead of 0.
This is done so gcc 4.9 (and lower) won't optimize the SSE4.1 assembly
instructions (when using -O1 and higher), because then the configure test
might incorrectly pass even though the assembler doesn't support the
SSE4.1 instructions (the test will pass because the compiler does support
the intrinsics).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91806
Cc: "11.0 11.1" <[email protected]>
Signed-off-by: Oded Gabbay <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
(cherry picked from commit 6e44bbe0f5496b1aea2b4a29adae7990b62fda33)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=32a7c9c9fb25e173ea7318f9e9e01d6c7bea29dc
Author: Jonathan Gray <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
configure: check for python2.7 for PYTHON2
Check for a 'python2.7' binary, 'python' and 'python2' are not
provided by the OpenBSD python 2.7.x packages.
Signed-off-by: Jonathan Gray <[email protected]>
Cc: "11.0 11.1" <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
(cherry picked from commit 4ef44bb484cbc0336d4fdcb8edce889ed1283732)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a82422f4a463e435ed8a9d356acbe0524d6fe3d4
Author: Jonathan Gray <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
configure.ac: use pkg-config for libelf
Use PKG_CHECK_MODULES to get the flags to link libelf
v2: keep AC_CHECK_LIB as a fallback for elfutils provided
libelf that doesn't install a pkg-config file.
Signed-off-by: Jonathan Gray <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Tested-by: Michel Dänzer <[email protected]>
Cc: "11.0 11.1" <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
(cherry picked from commit 7f585a6a98d0553ec0ba48e18b1d9bac1256881a)
[Emil Velikov: squash trivial conflict]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/gallium/targets/opencl/Makefile.am
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6777c64548a8e38b317274b9724ef68d05f31aab
Author: Samuel Pitoiset <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nvc0: free memory allocated by the prog which reads MP perf counters
This fixes a long time ago memory leak (even before all my query
related changes).
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 9aca60bfb07d87d82aff943a23cfa693e2712528)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b26945c2ed0007e62dd5f439c6c71957e69b828a
Author: Ian Romanick <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
meta/generate_mipmap: Work-around GLES 1.x problem with GL_DRAW_FRAMEBUFFER
GL_DRAW_FRAMEBUFFER does not exist in OpenGL ES 1.x, and since
_mesa_meta_begin hasn't been called yet, we have to work-around API
difficulties. The whole reason that GL_DRAW_FRAMEBUFFER is used instead
of GL_FRAMEBUFFER is that the read framebuffer may be different. This
is moot in OpenGL ES 1.x.
I have another patch series that would also fix this (by removing the
calls to _mesa_BindFramebuffer and friends), but it's not quite ready
yet... and I think it may be a bit heavy for some stable branches.
Consider this a stop-gap fix.
Signed-off-by: Ian Romanick <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93215
Cc: "11.0 11.1" <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
(cherry picked from commit 96dc732ed81f48d8bbc7aa6fb4d9c2833b691189)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=646be4a262bca3650418cd6e411a01fcc0a7e1b9
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
glsl: assign varying locations to tess shaders when doing SSO
GRID Autosport uses SSO shaders. When a tessellation evaluation shader
is passed through this, it triggers assertion failures down the line
with unassigned varying locations. Make sure to do this when the first
shader in the pipeline is not a vertex shader.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit eca8f38dcffb700fdfe413a707d524e6a84bd453)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=62060f0809164a5722a594209e6702808ae1638c
Author: Emil Velikov <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
cherry-ignore: don't pick a specific i965 formats patch
commit 839793680f9 "MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals" causes a
handfull of regressions, some of which listed in fdo#92759.
Signed-off-by: Emil Velikov <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6aeef5e433622f55d0069dbb6c57f0263ef6580
Author: Neil Roberts <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: Add B8G8R8X8_SRGB to the alpha format override
brw_init_surface_formats overrides the render format for RGBX formats
which aren't supported for rendering so that they internally use RGBA
instead. However, B8G8R8X8_SRGB was missing so it wasn't marked as a
renderable format. This patch just adds it.
Cc: "11.0 11.1" <[email protected]>
Cc: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 43f4be5f06b7a96b96a3a7b43f5112139a1f423a)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e1e68f2e17b5ff4eb02504a62405a46521d03d0
Author: Neil Roberts <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: Add MESA_FORMAT_B8G8R8X8_SRGB to brw_format_for_mesa_format
This will be used in a subsequent patch as the format for RGB visuals.
Cc: "11.0 11.1" <[email protected]>
Cc: Ilia Mirkin <[email protected]>
Suggested-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit c769efda939e06338d41e1046a5f954c690951d5)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6367271f75123a8a3e1562ab2a6d22befaa4c43e
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: can't have predication and immediates
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 6aca7fecb7f7b6c67cf0315e781060a8d1d4b704)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1a5b7a86361b5e2c10d22a65aab236d319937c0
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
gallium/radeon: fix Hyper-Z hangs by programming PA_SC_MODE_CNTL_1 correctly
This is the recommended setting according to hw people and it makes Hyper-Z
stable. Just the two magic states.
This fixes Evergreen, Cayman, SI, CI, VI (using the Cayman code).
Cc: 11.0 11.1 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
(cherry picked from commit d3c08309abd17b6e0d466b677af57e3cc74b0e00)
[Emil Velikov: s/radeon_set_context_reg/r600_write_context_reg/g]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/gallium/drivers/r600/evergreen_state.c
src/gallium/drivers/radeon/cayman_msaa.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9ebfebb7916fa8d4d91c0ed534fa75418491b8b
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: apply the streamout workaround to Fiji as well
Cc: 11.0 11.1 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
(cherry picked from commit 787ada6bf65a58b1bab5a30be86698e9b7b0797e)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=58f914c506adcf20563e2ab001e2bba21200f1a3
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: don't call of u_prims_for_vertices for patches and rectangles
Both caused a crash due to a division by zero in that function.
This is an alternative fix.
Cc: 11.0 11.1 <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
(cherry picked from commit 0f9519b938d78ac55e8e5fdad5727a79baf18d42)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=00fec0e4e115188caae347dd7d04acac10a08504
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
mesa/shader: return correct attribute location for double matrix arrays
If we have a dmat2[4], then dmat2[0] is at 17, dmat2[1] at 19,
dmat2[2] at 21 etc. The old code was returning 17,18,19.
I think this code is also wrong for float matricies as well.
There is now a piglit for the float case.
This partly fixes:
GL41-CTS.vertex_attrib_64bit.limits_test
[airlied: update with Tapani suggestion to clean it up].
Cc: "11.0 11.1" <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 18ad641c3b2e926b8b3e2bd1df31fa739624cbe4)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=276bd08900a43223152a46d3a31646a909ead2a9
Author: Patrick Rudolph <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
gallium/util: return correct number of bound vertex buffers
In case a state tracker unbinds every slot by a seperate
pipe->set_vertex_buffers() call, starting from slot zero, the number
of bound buffers would not reach zero at all.
The current algorithm does not account for pre-existing holes in the
buffer list.
Unbinding all buffers at once or starting at the top-most slot results
in correct behaviour.
Calculating the correct number of bound buffers fixes a NULL pointer
dereference in nvc0_validate_vertex_buffers_shared().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93004
Signed-off-by: Patrick Rudolph <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 79bff488bc23b8615cc37069b6c5914c56be835f)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=97df531987ca5512d90b11b04b0df3dc6b48aab7
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
mesa/varray: set double arrays to non-normalised.
Doesn't have any effect in practice I don't think, but
CTS reads back using GetVertexAttrib.
This fixes: GL41-CTS.vertex_attrib_64bit.get_vertex_attrib
Cc: "11.0 11.1" <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 21abaad8fe7b5bf78737b9cf009548f41e4777b9)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0eff2eb2ae5ac59944534233deb1b78c0d0bc057
Author: Patrick Rudolph <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50,nvc0: fix use-after-free when vertex buffers are unbound
Always reset the vertex bufctx to make sure there's no pointer to
an already freed pipe_resource left after unbinding buffers.
Fixes use after free crash in nvc0_bufctx_fence().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93004
Signed-off-by: Patrick Rudolph <[email protected]>
[imirkin: simplify nvc0 fix, apply to nv50]
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 432a798cf5c7fab18a3e32d4073840df7d0d37cb)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac72425a1e3599bfecfed83e3102e9e058b6dead
Author: Francisco Jerez <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: Resolve color and flush for all active shader images in
intel_update_state().
Fixes
arb_shader_image_load_store/execution/load-from-cleared-image.shader_test.
Couldn't reproduce any significant FPS regression in CPU-bound
benchmarks from the Finnish benchmarking system on neither VLV nor BSW
after 30 runs with 95% confidence level.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92849
Cc: Chris Wilson <[email protected]>
Cc: Jason Ekstrand <[email protected]>
Cc: "11.0 11.1" <[email protected]>
Tested-by: Jordan Justen <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
(cherry picked from commit 595c8180714da1d97be445b9a66affa1dfea39f6)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd7be2d07c4a680b7336a6d5315511da63844169
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: handle doubles in lds load path.
This handles loading doubles from LDS properly.
Reviewed-by: Michel Dänzer <[email protected]>
Cc: "11.0 11.1" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 8c9e40ac22ce5a60753172a8f95a120d84a3ec4c)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09c4907da0105666ba3a4d45e83a7009fd275609
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600: handle geometry dynamic input array index
This fixes:
glsl-1.50/execution/geometry/dynamic_input_array_index.shader_test
my profanity.
We need to load the AR register with the value from the index reg
Cc: "11.0 11.1" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit cce3864046be104933fd4f1bb7a4b36092ff4925)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7960ad1949b3cff9b2020eaecc9ed88bee15857
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600g: fix geom shader input indirect indexing.
This fixes:
gs-input-array-vec4-index-rd
The others run out of gprs unfortunately.
Cc: "11.0 11.1" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 38542921c785efb37bae88db409d278990684fa4)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e86c612691c6fe0ac830e646dd90f8bf2b3a277d
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600/shader: add utility functions to do single slot arithmatic
These utilities are to be used to do things like integer adds and
multiplies to be used in calculating the LDS offsets etc.
It handles CAYMAN MULLO differences as well.
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 0696ebc899d3aa125ae85b757c5fba137617ecaa)
[Emil Velikov: requred by the next commit]
Nominated-by: Emil Velikov <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=10773ed2498f1482fcfd8933efdf6797c980491c
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600/shader: split address get out to a function.
This will be used in the tess shaders.
Reviewed-by: Oded Gabbay <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 4d64459a92a4c1a64fb7051fd1320c14c1854dcb)
[Emil Velikov: required by the commit after the next one]
Nominated-by: Emil Velikov <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea8d4b0f4ec75d6650ffc4182464fa63f532c769
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: fix cutoff for using r63 vs r127 when replacing zero
The only effect here is a space savings - 822 programs in shader-db
affected with the following overall change:
total bytes used in shared programs : 44154976 -> 44139880 (-0.03%)
Fixes: 641eda0c (nv50/ir: r63 is only 0 if we are using less than 63
registers)
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit f920f8eb026d39c0adb547a90399e76b8351fec6)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f35a84ba31927dc66d713b82e83ceb48a773425e
Author: Matt Turner <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
glsl: Allow binding of image variables with 420pack.
This interaction was missed in the addition of ARB_image_load_store.
Cc: "11.0 11.1" <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93266
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
(cherry picked from commit c200e606f7348a6d75e4cf72fb538f5d78d67649)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4acb394f459b58725a2059a911b6236703c44eb2
Author: Jason Ekstrand <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965/nir: Remove unused indirect handling
The one and only place where the FS backend allows reladdr is on uniforms.
For locals, inputs, and outputs, we lower it away before the backend ever
sees it. This commit gets rid of the dead indirect handling code.
Cc: "11.0" <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 22c273de2b97743587310f7bbf66767191bde866)
[Emil Velikov: squash trivial conflicts]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=683d65dae3e673ee95d544008874edf1255e87cf
Author: Jason Ekstrand <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965/state: Get rid of dword_pitch arguments to buffer functions
Cc: "11.0" <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit abb569ca18db159ae3e4c4b51d01e5a8b3215e04)
[Emil Velikov: drop hunks for missing functions, drop gen7_cs_state.c]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
src/mesa/drivers/dri/i965/gen7_cs_state.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=147c3fbdb3f779f5172304e3be10cc27e0e67be7
Author: Jason Ekstrand <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965/vec4: Use a stride of 1 and byte offsets for UBOs
Cc: "11.0" <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92909
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 05bdc21f84edc200a0b0a695b79d12f25cc00645)
[Emil Velikov: s/brw_imm_ud/src_reg/g;s/brw_imm_d/src_reg/]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ae22b3ebde780c2c88b5bfceaf172e311bd4742
Author: Jason Ekstrand <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965/fs: Use a stride of 1 and byte offsets for UBOs
Cc: "11.0" <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 13ad8d03f201a4d09bf7ab9078b00807d61dfada)
[Emil Velikov]
- s/const_offset_reg.ud/const_offset_reg.fixed_hw_reg.dw1.ud/
- s/brw_imm_ud/fs_reg/
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/mesa/drivers/dri/i965/brw_fs.cpp
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=34cbde2e6320a55f54180e7f9f68db435b58e542
Author: Jason Ekstrand <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965/vec4: Use byte offsets for UBO pulls on Sandy Bridge
Previously, the VS_OPCODE_PULL_CONSTANT_LOAD opcode operated on
vec4-aligned byte offsets on Iron Lake and below and worked in terms of
vec4 offsets on Sandy Bridge. On Ivy Bridge, we add a new *LOAD_GEN7
variant which works in terms of vec4s. We're about to change the GEN7
version to work in terms of bytes, so this is a nice unification.
Cc: "11.0" <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit e3e70698c3cfa7e9acccd6eddfb37516c45d5ac2)
[Emil Velikov: s/brw_imm_ud/src_reg/g ,s/offset.ud/offset.dw1.ud/ ]
Signed-off-by: Emil Velikov <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b82519b48fe9b778bac711bc55f76df4f9c9229
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
gk110/ir: fix imad sat/hi flag emission for immediate args
According to nvdisasm both the immediate and non-imm cases use the same
bits. Both of these flags are quite rarely set though.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 1d708aacb7631833b0f04e704481854428f60ba3)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=accb4cdb3b52044d1029c856bc636087eb6dee6a
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
gk104/ir: sampler doesn't matter for txf
We actually leave the sampler unset for OP_TXF, which caused the GK104+
logic to treat some texel fetches as indirect. While this works, it's
incredibly wasteful. This only happened when the texture was > 0 (since
sampler remained == 0).
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 63b850403c90f33c295d3ad6be4ad749d4ea6274)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c18d27b72082da9abd50931c3b0364125740e103
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
gk110/ir: fix imul hi emission with limm arg
The elemental demo hits this case.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit db072d20867426958153279575dfdc2049b5f595)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b33f0095574a02538ddf19f8505731f9605d339b
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: avoid looking at uninitialized srcMods entries
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 2b98914fe01f1c7b2de8a096c8923b3ab0a69578)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c049c3ff27326ddbb85a94cf5c848a5c0d50275
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: fix DCE to not generate 96-bit loads
A situation where there's a 128-bit load where the last component gets
DCE'd causes a 96-bit load to be generated, which no GPU can actually
emit. Avoid generating such instructions by scaling back to 64-bit on
the first load when splitting.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 49692f86a1b77fac4634d2a3f0502ec7451c3435)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=52aa4cc42db30ec96f1d5974fb51a6d1ea89fab0
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: fix Fiji for LLVM <= 3.7
Cc: 11.0 11.1 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
(cherry picked from commit dd27825c8cf0e7b55ebaa139e299f275943d22f6)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a322e3b115381051c059bd7c4d3f2f9acf19dc71
Author: Tapani Pälli <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: use _Shader to get fragment program when updating surface state
Atomic counters and Images were using ctx::Shader that does not take in
to account program pipeline changes, ctx::_Shader must be used for SSO to
work. Commit c0347705 already changed ubo's to use this.
Fixes failures seen with following Piglit test:
arb_separate_shader_object-atomic-counter
Signed-off-by: Tapani Pälli <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 231db5869c2c0f32608f39100bffff569da21bea)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd2cf11ba8bdd3f1383ce11dcf4fe432e34856bd
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: don't forget to mark flagsDef on cvt in txb lowering
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 101e315cc167b0b00319aa70f64c49470e2525f8)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=65f8299459631cb0bb0495d8d220aae4cc691875
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: fix instruction permutation logic
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 06055121e6386bc74e4558a86ef690eae9556482)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=538c06282f698583bdb834964632eb387f8c7c23
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: the mad source might not have a defining instruction
For example if it's $r63 (aka 0), there won't be a definition.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit 11fcf46590129abfa2ca2117a320e8a8052761e4)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=49eab2dfaf1876cc2028e7a6a7336314cb142c10
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nv50/ir: deal with loops with no breaks
For example if there are only returns, the break bb will not end up part
of the CFG. However there will have been a prebreak already emitted for
it, and when hitting the RET that comes after, we will try to insert the
current (i.e. break) BB into the graph even though it will be
unreachable. This makes the SSA code sad.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit adcc547bfbef362067bb3b4e3aee75b287bc6189)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d352788290d1c71ac90ba8f1249e5b9a6f59f57
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
nvc0/ir: fold postfactor into immediate
SM20-SM50 can't emit a post-factor in the presence of a long immediate.
Make sure to fold it in.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "11.0 11.1" <[email protected]>
(cherry picked from commit ff61ac48387d3f42ede50a572c11f404f4cd3abb)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8e398d4eb9afe0175733930c4ddde3aa4a2b1de
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600: SMX returns CONTEXT_DONE early workaround
streamout, gs rings bug on certain r600s, requires a wait idle
before each surface sync.
Reviewed-by: Marek Olšák <[email protected]>
Cc: "10.6 11.0 11.1" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit af4013d26b3203a794ae34fe0c98139bc1058273)
[Emil Velikov: s/radeon_set_config_reg/r600_write_config_reg/g ]
Signed-off-by: Emil Velikov <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=837f316ec7a32d5a2311d3478f04fdbbcdf174a9
Author: Dave Airlie <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
r600: do SQ flush ES ring rolling workaround
Need to insert a SQ_NON_EVENT when ever geometry
shaders are enabled.
Reviewed-by: Marek Olšák <[email protected]>
Cc: "10.6 11.0 11.1" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit b63944e8b9177d231b3789bf84ea9e67b9629905)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=75d5558cc3168925ea0fa78f36a11b6fc49c5e32
Author: Kenneth Graunke <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: Fix scalar vertex shader struct outputs.
While we correctly set output[] for composite varyings, we set completely
bogus values for output_components[], making emit_urb_writes() output
zeros instead of the actual values.
Unfortunately, our simple approach goes out the window, and we need to
recurse into structs to get the proper value of vector_elements for each
field.
Together with the previous patch, this fixes rendering in an upcoming
game from Feral Interactive.
v2: Use pointers instead of pass-by-mutable-reference (Jason, Matt).
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
(cherry picked from commit 3810c1561401aba336765d64d1a5a3e44eb58eb3)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5420e754564dfe3b07df65d5a61ea9dd6b3ccc1
Author: Kenneth Graunke <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
i965: Fix fragment shader struct inputs.
Apparently we have literally no support for FS varying struct inputs.
This is somewhat surprising, given that we've had tests for that very
feature that have been passing for a long time.
Normally, varying packing splits up structures for us, so we don't see
them in the backend. However, with SSO, varying packing isn't around
to save us, and we get actual structs that we have to handle.
This patch changes fs_visitor::emit_general_interpolation() to work
recursively, properly handling nested structs/arrays/and so on.
(It's easier to read with diff -b, as indentation changes.)
When using the vec4 VS backend, this fixes rendering in an upcoming
game from Feral Interactive. (The scalar VS backend requires additional
bug fixes in the next patch.)
v2: Use pointers instead of pass-by-mutable-reference (Jason, Matt)
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
(cherry picked from commit 3e9003e9cf55265ab1fb6522dc5cbb2f455ea1f9)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c124cda4438fd30adaccc0faf458848f51e9de95
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: fix a hang due to uninitialized border color registers
Just point the hw to valid memory.
This fixes hangs in piglit/depthstencil-render-miplevel tests.
What's even more bizzare is that the hanging tests report "skip".
Reviewed-by: Michel Dänzer <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b21a5a37b88f9a0cc5590358f10c65ea2dd7c9a3
Author: Marek Olšák <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: fix occlusion queries on Fiji
Tested.
(cherry picked from commit bfc14796b077444011c81f544ceec5d8592c5c77)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9dbe209106f83880f6432b95f65b76eb20b5f00
Author: Tom Stellard <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values
The compiler has more information and is able to optimize the bits
it sets in these registers.
Reviewed-by: Marek Olšák <[email protected]>
CC: <[email protected]>
(cherry picked from commit 89851a296536b89364fe6104d13330975788f960)
[Emil Velikov: squash trivial conflict]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/gallium/drivers/radeonsi/si_compute.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3965a21e9506e48dd0927efb2df26963e84bcdc1
Author: Tom Stellard <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
radeonsi: Rename si_shader::ls_rsrc{1,2} to si_shader::rsrc{1,2}
In the future, these will be used by other shaders types.
Reviewed-by: Marek Olšák <[email protected]>
(cherry picked from commit 95e051091676584fd7bfba9d0316c3747bf17f35)
[Emil Velikov: squash trivial conflicts]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/gallium/drivers/radeonsi/si_state_draw.c
src/gallium/drivers/radeonsi/si_state_shaders.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ee592b09554983c46405ad8e6396921ae52935d
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
freedreno/a4xx: point regid to "red" even for alpha-only rb formats
Looks like a4xx hw does this in a more standard way and we don't need to
hack around it like we do on a3xx. Fixes GL_ALPHA formats in
fbo-blending-formats, fbo-colormask-formats, and fbo-alphatest-formats.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
(cherry picked from commit ff9450ecd1f7635f8917e3177f0ef18eb8f9f49b)
[Emil Velikov: squash trivial conflict]
Signed-off-by: Emil Velikov <[email protected]>
Conflicts:
src/gallium/drivers/freedreno/a4xx/fd4_program.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad43f5a5247f7de74d0c0795d69370a40b1886cf
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
freedreno/a4xx: fix 5_5_5_1 texture sampler format
This fixes teximage-colors, fbo-generatemipmap-formats, and probably
others (in relation to the RGB5 formats, others still fail).
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
(cherry picked from commit 769b3ab6c5111f50502f9df0e8930c8d13f475c7)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9aee0ceb3aa369f32ebc9b50b47f75e4901c0516
Author: Ilia Mirkin <[email protected]>
Date: Fri Dec 18 12:25:53 2015 +0000
freedreno/a4xx: support lod_bias
The lower layers assume that we support this, and it's been core since
GL 1.4. This fixes a slew of piglit tests, especially around
tex-miplevel-selection.
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
(cherry picked from commit 0a4462ad6ee921ed805ad51e330b819b95ee90d6)
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