URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=438d421f8bb3f65402701628c3504c0ad04184c0
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Fri Jan 29 20:28:12 2016 -0500
nvc0: avoid crashing when there are holes in vertex array bindings
When using the "shared" vertex array configuration strategy, we bind
each of the buffers as a separate array. However there can be holes in
such vertex buffer lists, so just emit a disable for those.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Cc: mesa-sta...@lists.freedesktop.org
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=899b1b98a4ab094456632e08ce01ffb106519012
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sat Jan 2 22:23:44 2016 -0500
nvc0: enable atomic counters and ssbo
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=48cf392c0e68fcfbc6ce3063b41fbacdd1f92807
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 17 04:34:08 2016 -0500
nv50/ir: handle new TGSI MEMBAR opcode
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=df043f076464d817a9d88c4c43757e65b6eae3f9
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 10 21:47:04 2016 -0500
nvc0/ir: fix atomic compare-and-swap arguments
Teach the emitter that the two registers are sequential, and drop the
second arg entirely, in favor of a double-wide first argument.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b9a77b905bda3003dc57efb99879499ebc4ba41
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Jan 18 23:34:01 2016 -0500
nv50/ir: add support for indirect buffer loading
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c4eeb0b5cf17caa06cb3fa46d4f64e6a8005d23
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Dec 14 00:13:34 2015 -0500
nv50/ir: add SUQ op by reading the info from driver constbuf
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3083c70823d8f4bfdabcf38f98dfebeff0a2b2b
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sat Jan 2 22:25:31 2016 -0500
nv50/ir: add support for BUFFER accesses
This largely leaves the existing image logic alone. When image support
is added this will have to be harmonized somehow.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=abe427ebd250377b21204dad07be6a207d30e9a0
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 10 22:44:32 2016 -0500
nvc0: handle shader buffer memory barrier
Issue a MEM_BARRIER. No idea if this is sufficient. As there are no
tests for this, it'll have to do for now.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe01be4ad51b5b3cbc53ec6e0737819c2986bd07
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sat Jan 2 22:26:46 2016 -0500
nvc0: add state management for shader buffers
(address, length) pairs are uploaded to the driver constbuf as well to
make these values available to the shaders.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b4688c4615afd30f0fe2d76043b6fe6d4b61a188
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Dec 13 17:07:35 2015 -0500
nvc0: double per-shader stage driver constants area
We need to store a lot more info now with per-buffer address/size.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ae725d574667042ed6a026f415a47fb8ce45839a
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Nov 9 07:09:25 2015 -0500
trace: add support for set_shader_buffers
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com> (v1)
v1 -> v2: add arg_begin/arg_end around buffer array
Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fea25db92520ba2e74352d3aae626e7b26b4a84c
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Jan 18 00:13:51 2016 -0500
st/mesa: enable ARB_shader_storage_buffer_object when supported
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fb8fac853b09416b7462e61f00233844319a505
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 10 22:39:16 2016 -0500
st/mesa: add shader buffer barrier bit
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=792bab24ac33f6614d549cfaca219a3855908e0d
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 17 04:32:42 2016 -0500
st/mesa: add support for memory barrier intrinsics
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com> (v2)
v1 -> v2: use TGSI_MEMBAR defines
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0e1c54a4f182f24dc826af0f5212803d723aafb
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Dec 13 23:04:32 2015 -0500
st/mesa: use RESQ to find buffer size
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Reviewed-by: Edward O'Callaghan <eocallag...@alterapraxis.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=688003669469d787847d58572956e9d3fcecaf3c
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Jan 18 00:08:24 2016 -0500
st/mesa: add support for SSBO binding and GLSL intrinsics
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
v1 -> v2: some 80 char reformatting
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d6f9ccf6b7ca7c9d1ac40354d6ae47c130e2024
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Fri Sep 19 20:59:17 2014 -0400
st/mesa: add atomic counter support
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fddb677e6e8261fc7a12652224698838ac10b22
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 17 23:57:48 2016 -0500
mesa: add PROGRAM_IMMEDIATE, PROGRAM_BUFFER
This makes PROGRAM_IMMEDIATE a first-class gl_register_file type, and
adds PROGRAM_BUFFER to the list. These are used purely inside
glsl_to_tgsi conversion.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=35f8488668fe055ffc8d0f9f897fa73e28e5e00d
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Mon Dec 28 14:03:50 2015 -0500
glsl: keep track of ssbo variable being accessed, add access params
Currently any access params (coherent/volatile/restrict) are being lost
when lowering to the ssbo load/store intrinsics. Keep track of the
variable being used, and bake its access params in as the last arg of
the load/store intrinsics.
If the variable is accessed via an instance block, then 'variable'
points to the instance block variable and not the field inside the
instance block that we are accessing. In order to check access
parameters for the field itself we need to detect this case and keep
track of the corresponding field struct so we can extract the specific
field access information from there instead.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com> (v1)
v1 -> v2: add tracking of struct field
v2 -> v3: minor adjustments based on Iago's feedback
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b089c7ffe2c46a5d5d01ec315fb3e5a07695d44
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Tue Jan 19 01:43:40 2016 -0500
glsl: always initialize image_* fields, copy them on interface init
Interfaces can have image properties set in case they are buffer
interfaces. Make sure not to lose this information.
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Iago Toral Quiroga <ito...@igalia.com>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ccc42fd2c63502ffb1273a5e4ff7c8d77dc6062
Author: Ilia Mirkin <imir...@alum.mit.edu>
Date: Sun Jan 17 04:24:49 2016 -0500
tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsics
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.ol...@amd.com> (v1)
v1 -> v2: add defines for the various bits
Reviewed-by: Roland Scheidegger <srol...@vmware.com>
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