Module: Mesa Branch: master Commit: 76f6f59c6e26b1165d9885463b244dc4c88b61ef URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76f6f59c6e26b1165d9885463b244dc4c88b61ef
Author: Kenneth Graunke <[email protected]> Date: Tue Feb 9 16:16:00 2016 -0800 i965: Make brw_clear_cache flag all the bits on both pipelines. Setting brw->ctx.NewDriverState and brw->ctx.NewGLState affects the dirty bits for the current pipeline. But, we need to flag everything dirty on *both* pipelines, so that when we switch back, we'll realize our programs are stale and re-upload them. To accomplish this, flag the saved state for both pipelines. Only one of them should matter, but this way we don't have to check which we need to set. It's harmless to set the other. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Tested-by: Ilia Mirkin <[email protected]> --- src/mesa/drivers/dri/i965/brw_state_cache.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index cac06fa..ce178aa 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -387,8 +387,12 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) /* We need to make sure that the programs get regenerated, since * any offsets leftover in brw_context will no longer be valid. */ - brw->NewGLState |= ~0; - brw->ctx.NewDriverState |= ~0ull; + brw->NewGLState = ~0; + brw->ctx.NewDriverState = ~0ull; + brw->state.pipelines[BRW_RENDER_PIPELINE].mesa = ~0; + brw->state.pipelines[BRW_RENDER_PIPELINE].brw = ~0ull; + brw->state.pipelines[BRW_COMPUTE_PIPELINE].mesa = ~0; + brw->state.pipelines[BRW_COMPUTE_PIPELINE].brw = ~0ull; intel_batchbuffer_flush(brw); } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
