URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b74784638df4c6b1d25aa04044946e380ee61c28
Author: Nicolai Hähnle <[email protected]>
Date: Tue Mar 15 13:08:21 2016 -0500
docs: mark GL_ARB_shader_image_load_store/_size as done for radeonsi
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5219eb15e12903a10c0aea22a7460bb6867a958e
Author: Edward O'Callaghan <[email protected]>
Date: Mon Jan 11 00:50:32 2016 +1100
radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGES
This enables ARB_shader_image_load_store and ARB_shader_image_size.
Signed-off-by: Edward O'Callaghan <[email protected]>
[allow the same number of images for all shader stages and require LLVM 3.9]
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f942ac5eedec5b5517618c52434d7c0794163c2
Author: Nicolai Hähnle <[email protected]>
Date: Tue Mar 15 20:58:12 2016 -0500
radeonsi: disable early Z if the fragment shader writes to memory
Empirically, both the EXEC_ON_* flags and LATE_Z are necessary.
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79762e877cd9b439d5f7697d3fea8d930ab05646
Author: Nicolai Hähnle <[email protected]>
Date: Tue Mar 15 20:54:30 2016 -0500
tgsi/scan: add writes_memory to flag presence of stores or atomics
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9d935ed0e2839d2f07220a9f10477ab3cc79486
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 14:44:46 2016 -0500
radeonsi: force the DCC enable bit off in image descriptors for writing (v2)
This avoids a lockup at least on Tonga.
v2: only force DCC off on VI+ (Marek)
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43f5ce1d20dac94d83d6d6c31b88b4227316877d
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 11:37:27 2016 -0500
radeonsi: implement MemoryBarrier (v2)
v2: invalidate both constant and VMEM/TC L1 for constant buffers (Marek)
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=97352aa50af87b50271bc632abfb971caca46e2b
Author: Nicolai Hähnle <[email protected]>
Date: Mon Mar 14 10:22:21 2016 -0500
radeonsi: implement volatile memory access
Prevent loads from being re-ordered or coalesced.
Atomics don't need special handling by definition, and stores don't need
special handling because LLVM is unable to detect dead image or buffer
stores.
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a61b428f477e7eef9f18f2fd43f661f193ece39
Author: Nicolai Hähnle <[email protected]>
Date: Sat Mar 12 21:32:34 2016 -0500
radeonsi: implement coherent memory access (v2)
v2: set glc=1 for volatile also on buffers
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6fa650454db5e3308a5c3618e4586a2c8f537cb
Author: Nicolai Hähnle <[email protected]>
Date: Thu Mar 10 18:12:44 2016 -0500
radeonsi: Lower TGSI_OPCODE_MEMBAR down to LLVM op
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7a85a8a0aae692303601c5359ba8e76d78e1c28
Author: Nicolai Hähnle <[email protected]>
Date: Thu Feb 11 20:54:25 2016 -0500
radeonsi: Lower TGSI_OPCODE_ATOM* down to LLVM op
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfcefcb3c77ad734d3deee888b6881b4c20f28a3
Author: Nicolai Hähnle <[email protected]>
Date: Tue Feb 9 11:51:31 2016 -0500
radeonsi: Lower TGSI_OPCODE_STORE down to LLVM op
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e82dedeca9670012a24b3d5da0832ca2c5c0861
Author: Nicolai Hähnle <[email protected]>
Date: Tue Feb 9 10:59:14 2016 -0500
radeonsi: Lower TGSI_OPCODE_LOAD down to LLVM op (v3)
v2: new signature style for buffer intrinsics (offsets)
v3: new signature style for llvm.amdgcn.buffer.load.format (overloaded
return)
Reviewed-by: Marek Olšák <[email protected]> (v2)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=136686a51dd5f92c3905253d7abf7ad40f717016
Author: Nicolai Hähnle <[email protected]>
Date: Tue Feb 9 15:01:35 2016 -0500
radeonsi: extract the LLVM type name construction into its own function
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=02bd0cd7b108dd903ae40af1f70a36f7553bfa7e
Author: Nicolai Hähnle <[email protected]>
Date: Sun Feb 7 18:41:09 2016 -0500
radeonsi: Lower TGSI_OPCODE_RESQ down to LLVM op
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=75539197c7687410228d4fb18b0faa201474eff2
Author: Nicolai Hähnle <[email protected]>
Date: Sun Feb 7 17:34:57 2016 -0500
radeonsi: extract TXQ buffer size computation into its own function
This will allow it to be reused for RESQ.
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=515fb2c09c51ada05db80a3ee337bc7265edfdd3
Author: Nicolai Hähnle <[email protected]>
Date: Sun Feb 7 22:30:46 2016 -0500
radeonsi: decompress shader images
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f61566b77a6164ad0830c4c7d363d91f6859a794
Author: Nicolai Hähnle <[email protected]>
Date: Tue Mar 15 22:01:39 2016 -0500
radeonsi: update shader image descriptor for invalidated buffer
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e85cf35a6516c44e33663fcd9637c6b434bb63ee
Author: Nicolai Hähnle <[email protected]>
Date: Sat Feb 6 18:32:13 2016 -0500
radeonsi: implement set_shader_images (v2)
Whether DCC is disabled depends on the access flags with which the image
is bound: image_load supports DCC, but store and atomic don't.
v2: remove an unnecessary masking of images->desc.enabled_mask
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1b7268f014c78ac46b2f360959e681bad3091d5
Author: Nicolai Hähnle <[email protected]>
Date: Fri Mar 11 19:39:18 2016 -0500
gallium/radeon: make r600_texture_disable_dcc externally accessible
We will need it in radeonsi for shader images.
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=457f9c6b25240795039b1827876a3af5ffa2155b
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 15:06:15 2016 -0500
tgsi/scan: track which shader images are really buffers
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa096a14af09ef1ebb459b238e5c600a60e0ef7b
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 15:00:40 2016 -0500
tgsi/scan: add images_writemask
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=137954408172a5104f0f5650bae943d2ebf0aa07
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 11:37:10 2016 -0500
st/mesa: translate additional flags in MemoryBarrier
Re-order flags in the order in which they appear in the OpenGL spec in the
description of MemoryBarrier().
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=96cd908fd34ef711100c9beaed03c3c8ffd5873d
Author: Nicolai Hähnle <[email protected]>
Date: Sun Mar 13 11:36:53 2016 -0500
gallium: add additional PIPE_BARRIER_* bits
Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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