Module: Mesa
Branch: master
Commit: 8cde4ddbce330a45d27a350c7f4f18641d34fdd8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cde4ddbce330a45d27a350c7f4f18641d34fdd8
Author: Lionel Landwerlin <llandwer...@gmail.com>
Date: Mon Aug 8 20:30:08 2016 +0100
anv/pipeline/gen7: Set multisample modes
Fixes the following failures :
dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
Tested on IVB/HSW
Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
---
src/intel/vulkan/gen7_pipeline.c | 10 ++++++++--
src/intel/vulkan/gen8_pipeline.c | 2 +-
src/intel/vulkan/genX_pipeline_util.h | 5 +++++
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 1da28c0..135281d 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -68,7 +68,7 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
- pass, subpass, extra);
+ pCreateInfo->pMultisampleState, pass, subpass, extra);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
@@ -85,7 +85,8 @@ genX(graphics_pipeline_create)(
pCreateInfo->pMultisampleState->rasterizationSamples > 1)
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
- uint32_t samples = 1;
+ uint32_t samples = pCreateInfo->pMultisampleState ?
+ pCreateInfo->pMultisampleState->rasterizationSamples : 1;
uint32_t log2_samples = __builtin_ffs(samples) - 1;
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
@@ -273,6 +274,11 @@ genX(graphics_pipeline_create)(
}
wm.BarycentricInterpolationMode =
wm_prog_data->barycentric_interp_modes;
+
+ wm.MultisampleRasterizationMode = samples > 1 ?
+ MSRASTMODE_ON_PATTERN :
MSRASTMODE_OFF_PIXEL;
+ wm.MultisampleDispatchMode =
wm_prog_data->persample_dispatch ?
+ MSDISPMODE_PERSAMPLE :
MSDISPMODE_PERPIXEL;
}
}
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index d16ce7b..1840ce2 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -120,7 +120,7 @@ genX(graphics_pipeline_create)(
emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
- pass, subpass, extra);
+ pCreateInfo->pMultisampleState, pass, subpass, extra);
emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
diff --git a/src/intel/vulkan/genX_pipeline_util.h
b/src/intel/vulkan/genX_pipeline_util.h
index 0aa85ba..d3b15d9 100644
--- a/src/intel/vulkan/genX_pipeline_util.h
+++ b/src/intel/vulkan/genX_pipeline_util.h
@@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = {
static void
emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *rs_info,
+ const VkPipelineMultisampleStateCreateInfo *ms_info,
const struct anv_render_pass *pass,
const struct anv_subpass *subpass,
const struct anv_graphics_pipeline_create_info *extra)
@@ -396,6 +397,10 @@ emit_rs_state(struct anv_pipeline *pipeline,
raster.DXMultisampleRasterizationEnable = true;
raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0;
raster.ForceMultisampling = false;
+#else
+ raster.MultisampleRasterizationMode =
+ (ms_info && ms_info->rasterizationSamples > 1) ?
+ MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL;
#endif
raster.FrontWinding = vk_to_gen_front_face[rs_info->frontFace];
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