URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1e49be71360a5a6124b5e7911b98d1887911e41
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Thu Sep 8 21:34:16 2016 -0700
i965: Use blorp_copy for all copy_image operations on gen6+
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Chad Versace <chadvers...@chromium.org>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=540395bf9bba2a255809328d019b58a318e19c83
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Thu Sep 8 21:27:01 2016 -0700
i965/blorp: Add a copy_miptrees helper
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Chad Versace <chadvers...@chromium.org>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d038adca0eae173be0d2082f9b6d7e6d7c8aadf1
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Thu Sep 8 22:18:47 2016 -0700
intel/isl: Add support for RGB formats in X and Y-tiled memory
Normally, using a non-linear tiling format helps improve cache locality by
ensuring that neighboring pixels are usually close-by in memory. For RGB
formats, this still sort-of holds, but it can also lead to rather terrible
memory access patterns where a single RGB pixel value crosses a tile
boundary and gets split into two pieces in different 4K pages. It also
makes for some rather awkward calculations because your tile size is no
longer an even multiple of surface element size. For these reasons, we
chose to simply never create tiled RGB images in the Vulkan driver.
The GL driver, however, is not so kind so we need to support it somehow. I
briefly toyed with a couple of different schemes but this is the best one I
could come up with. The fundamental problem is that a tile no longer
contains an integer number of surface elements. I briefly considered a
couple other options but found them wanting:
1) Using floats for the logical tile size. This leads to potential
rounding error problems.
2) When presented with a RGB format, just make the tile 3-times as wide.
This isn't so nice because now our tiles are no longer power-of-two
size. Also, it can force the row_pitch to be larger than needed which,
while not strictly a problem for ISL, causes incompatibility problems
with the way the GL driver chooses surface pitches.
The chosen method requires that you pay attention and not just assume that
your tile_info is in the units you think it is. However, it's nice because
it provides a nice "these are the units" declaration in isl_tile_info
itself. Previously, the tile_info wasn't usable as a stand-alone structure
because you had to also know the format. It also forces figuring out how
to deal with inconsistencies between tiling and format back to the caller
which is good because the two different consumers of isl_tile_info really
want to deal with it differently: Computation of the surface size wants
the fewest number of horizontal tiles possible while get_intratile_offset
is far more concerned with things aligning nicely.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Acked-by: Chad Versace <chadvers...@chromium.org>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=883086500b130e4667108a52bca9f37defcd7564
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Fri Sep 9 08:57:14 2016 -0700
intel/isl: Allow valign2 for texture-only Y-tiled surfaces on gen7
The restriction that Y-tiled surfaces must have valign == 4 only aplies to
render targets but we were applying it universally. This causes problems
if ISL_FORMAT_R32G32B32_FLOAT is used because it requires valign == 2; this
should be okay because you can't render to that format.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Chad Versace <chadvers...@chromium.org>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54db5afd2c8bd3a32658b3fef698c6896f6a297b
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Sep 3 11:40:09 2016 -0700
intel/blorp: Work in terms of logical array layers
When Ivy Bridge introduced array multisampling, someone made the decision
to do lots of stuff throughout the driver in terms of physical array layers
rather than logical array layers. In ISL, we use logical array layers most
of the time and it really makes no sense to use physical array layers in
the blorp API. Every time someone passes physical array layers into blorp
for an array multisampled surface, they're always divisible by the number
of samples and we divide right away.
Eventually, I'd like to rework most of the GL driver internals to use
logical array layers but that's going to be a big project and will probably
happen as part of the ISL conversion. For now, we'll do the conversion in
brw_blorp and let blorp just use the logical layers.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa4627149dfe7cdb9f75d8e2f1bcaf1ad7006801
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Sep 3 09:49:24 2016 -0700
intel/blorp: Increase the presision of coordinate transform calculations
The result of this calculation goes into an fma() in the shader and we
would like it to be as precise as possible. The division in particular
was a source of imprecision whenever dst1 - dst0 was not a power of two.
This prevents regressions in some of the new Vulkan CTS tests for blitting
using a filtering of NEAREST.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c70be1ead52b7a51819dc37220111bb0505610a7
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 18:01:27 2016 -0700
intel/blorp: Add a swizzle parameter to blorp_clear
While we're here, we also re-arrange the parameters to better match the
parameter order of blorp_blit.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea1399aba07bfef728f43857643377c5842c1978
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 16:55:35 2016 -0700
intel/blorp: Make color_write_disable const and optional
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9286f62f11ccd3ffd8f7d3d93b516b79d5ab36fd
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 16:32:51 2016 -0700
intel/blorp: Add support for clearing R9G9B9E5 surfaces
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab03e59867ebf078d910063e717498cdf8905fa0
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 12:07:31 2016 -0700
intel/blorp: Add support for RGB destinations in copies
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ae8043fed264997e75b480dd30aa6ef44aae4e6
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 13:13:43 2016 -0700
intel/blorp: Add an entrypoint for doing bit-for-bit copies
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=941b4d063a7b12af773cc4837e6c0fa3b29abdc0
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 12:49:54 2016 -0700
intel/blorp: Pull the guts of blorp_blit into a helper
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e03edf1890d4b0a0dd131085b9e04aa4fbf6b12
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Tue Aug 30 11:18:39 2016 -0700
intel/blorp: Stop using the X/YOffset field of RENDER_SURFACE_STATE
While it can be useful, the field has substantial limtations. In
particular, the bittom 2 or 3 bits is missing so your offset always has to
be a multiple of 4 or 8. While surface alignments usually work out to make
this ok, when you start trying to fake compressed surfaces as uncompressed
(which we will want to do) this falls apart. The easiest solution is to
simply align all offsets to a tile boundary and munge the regions we're
copying to account for the intratile offset.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c170606fc68d1504c9dc34b4672b5bb08d719079
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Mon Aug 29 18:05:11 2016 -0700
intel/blorp: Use fake_interleaved_msaa in retile_w_to_y
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a613449f7147c4a9196f9e9cc31783029a7493f2
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Mon Aug 29 17:52:52 2016 -0700
intel/blorp: Use isl_get_interleaved_msaa_px_size_sa
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ac99eabb6570f0f3c5f7d7da1332a99ce636362
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Mon Aug 29 16:34:06 2016 -0700
intel/isl: Add a helper for getting the size of an interleaved pixel
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cc15ba5bb2e48930c9a8f8916790006ba32e22e
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Mon Aug 29 09:48:10 2016 -0700
intel/blorp: Handle 3D surfaces in convert_to_single_slice
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43d25edf78c3723ec76eb0704ed99f5345ef8d1e
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Mon Aug 29 09:16:06 2016 -0700
intel/isl: Fix an assert in get_intratile_offset_sa
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6da968b651f7c3f3475f68c80756adce441754e1
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Wed Aug 31 12:58:54 2016 -0700
intel/blorp: Fix the early return condition in convert_to_single_slice
The convert_to_single_slice operation is *mostly* idempotent. The only
non-repeatable thing it does is that, when it sets the intratile offset
fields, it just overwrites them instead of doing a += operation. This is
supposed to be ok because we have an early return at the top that should
make it bail of the surface is already a single slice. Unfortunately, the
if condition has been broken ever since it was first added in 96fa98c18.
This commit fixes the condition and adds an assert to ensure we don't stomp
any non-zero intratile offsets.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec7e0d62c5fe5b17e833c7ab91d0b753f0d02918
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 22:44:15 2016 -0700
intel/blorp: Use the surface format for computing offsets
If we use the view format, it may be an uncompressed view of a compressed
image which throws things off. Since we're computing offsets of images, we
want the actual surface offset anyway.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f2fecd11463da9d90a83ad65544271b35cd0d83
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 22:06:11 2016 -0700
intel/blorp: Don't assume R8_UINT in convert_to_single_slice
We're going to use it for more than just stencil textures
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2fc9c7e3d9b2bcd65c9e192bc11d3c87835f85dc
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 21:57:51 2016 -0700
intel/blorp: Take a destination swizzle in blorp_blit
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2dba5489ae82161ebbf1d6db3e63b27b45c17eae
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 21:48:40 2016 -0700
intel/blorp: Take an isl_swizzle instead of a SWIZZLE
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ddb21708c800dfbe3cea2df6aaaf7aed852761b
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Sat Aug 27 21:39:16 2016 -0700
intel/isl: Add an isl_swizzle structure and use it for isl_view swizzles
This should be more compact than the enum isl_channel_select[4] that we
were using before. It's also very convenient because we already had such a
structure in the Vulkan driver we just needed to pull it over.
Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
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