Module: Mesa Branch: master Commit: 50baaf6bc624e78f6d92f2316a370e11d4c4d882 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=50baaf6bc624e78f6d92f2316a370e11d4c4d882
Author: Samuel Pitoiset <[email protected]> Date: Thu Sep 15 18:11:56 2016 +0200 nvc0/ir: fix subops for IMAD Offset was wrong, it's at bit 8, not 4. Also, uses subr instead of sub when src2 has neg. Similar to GK110 now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected] --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index d83028c..d8ca6ab 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp @@ -735,9 +735,15 @@ CodeEmitterNVC0::emitUADD(const Instruction *i) void CodeEmitterNVC0::emitIMAD(const Instruction *i) { + uint8_t addOp = + (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg()); + assert(i->encSize == 8); emitForm_A(i, HEX64(20000000, 00000003)); + assert(addOp != 3); + code[0] |= addOp << 8; + if (isSignedType(i->dType)) code[0] |= 1 << 7; if (isSignedType(i->sType)) @@ -748,10 +754,6 @@ CodeEmitterNVC0::emitIMAD(const Instruction *i) if (i->flagsDef >= 0) code[1] |= 1 << 16; if (i->flagsSrc >= 0) code[1] |= 1 << 23; - if (i->src(2).mod.neg()) code[0] |= 0x10; - if (i->src(1).mod.neg() ^ - i->src(0).mod.neg()) code[0] |= 0x20; - if (i->subOp == NV50_IR_SUBOP_MUL_HIGH) code[0] |= 1 << 6; } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
