Module: Mesa
Branch: master
Commit: 5e5573b1bf8565f38e9b770b5357d069e80ff00d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e5573b1bf8565f38e9b770b5357d069e80ff00d
Author: Marek Olšák <marek.ol...@amd.com>
Date: Sat Nov 26 15:52:05 2016 +0100
radeonsi: disable RB+ blend optimizations for dual source blending
This fixes dual source blending on Stoney. The fix was copied from Vulkan.
The problem was discovered during internal testing.
Cc: 13.0 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>
---
src/gallium/drivers/radeonsi/si_state.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 911e979..1ccf5b6 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -557,6 +557,17 @@ static void *si_create_blend_state_mode(struct
pipe_context *ctx,
}
if (sctx->b.family == CHIP_STONEY) {
+ /* Disable RB+ blend optimizations for dual source blending.
+ * Vulkan does this.
+ */
+ if (blend->dual_src_blend) {
+ for (int i = 0; i < 8; i++) {
+ sx_mrt_blend_opt[i] =
+
S_028760_COLOR_COMB_FCN(V_028760_OPT_COMB_NONE) |
+
S_028760_ALPHA_COMB_FCN(V_028760_OPT_COMB_NONE);
+ }
+ }
+
for (int i = 0; i < 8; i++)
si_pm4_set_reg(pm4, R_028760_SX_MRT0_BLEND_OPT + i * 4,
sx_mrt_blend_opt[i]);
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