Module: Mesa Branch: master Commit: b13d30a72ba06187ba7398c1a56c34980a021005 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b13d30a72ba06187ba7398c1a56c34980a021005
Author: Topi Pohjolainen <[email protected]> Date: Tue Jan 10 10:24:26 2017 +0200 i965/blorp/gen6: Remove dead code in hiz setup Such as comment states for intel_miptree_hiz_buffer::mt, hiz_mt only exists for gen6. In addition, intel_hiz_miptree_buf_create() uses MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD unconditionally. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]> --- src/mesa/drivers/dri/i965/brw_blorp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index f21b41a..52f85ff 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -250,15 +250,15 @@ blorp_surf_for_miptree(struct brw_context *brw, struct intel_mipmap_tree *hiz_mt = mt->hiz_buf->mt; if (hiz_mt) { - if (brw->gen == 6 && - hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD) { - /* gen6 requires the HiZ buffer to be manually offset to the - * right location. We could fixup the surf but it doesn't - * matter since most of those fields don't matter. - */ - apply_gen6_stencil_hiz_offset(aux_surf, hiz_mt, *level, - &surf->aux_addr.offset); - } + assert(brw->gen == 6 && + hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD); + + /* gen6 requires the HiZ buffer to be manually offset to the + * right location. We could fixup the surf but it doesn't + * matter since most of those fields don't matter. + */ + apply_gen6_stencil_hiz_offset(aux_surf, hiz_mt, *level, + &surf->aux_addr.offset); assert(hiz_mt->pitch == aux_surf->row_pitch); } } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
