Module: Mesa Branch: master Commit: a1c1ba7d5649cca450ca81bf87be36c035a01db0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1c1ba7d5649cca450ca81bf87be36c035a01db0
Author: Dave Airlie <[email protected]> Date: Mon Jan 30 13:17:05 2017 +1000 radv: handle transfer_write as a dst flag. It appears we can get image barriers like: srcStageMask: VkPipelineStageFlags = 4096 (VK_PIPELINE_STAGE_TRANSFER_BIT) dstStageMask: VkPipelineStageFlags = 4096 (VK_PIPELINE_STAGE_TRANSFER_BIT) dependencyFlags: VkDependencyFlags = 0 memoryBarrierCount: uint32_t = 0 pMemoryBarriers: const VkMemoryBarrier* = NULL bufferMemoryBarrierCount: uint32_t = 0 pBufferMemoryBarriers: const VkBufferMemoryBarrier* = NULL imageMemoryBarrierCount: uint32_t = 1 pImageMemoryBarriers: const VkImageMemoryBarrier* = 0x7ffc882367b0 pImageMemoryBarriers[0]: const VkImageMemoryBarrier = 0x7ffc882367b0: sType: VkStructureType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER (45) pNext: const void* = NULL srcAccessMask: VkAccessFlags = 4096 (VK_ACCESS_TRANSFER_WRITE_BIT) dstAccessMask: VkAccessFlags = 4096 (VK_ACCESS_TRANSFER_WRITE_BIT) oldLayout: VkImageLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL (7) newLayout: VkImageLayout = VK_IMAGE_LAYOUT_GENERAL (1) srcQueueFamilyIndex: uint32_t = 4294967295 dstQueueFamilyIndex: uint32_t = 4294967295 image: VkImage = 0x2df55e0 subresourceRange: VkImageSubresourceRange = 0x7ffc882367e0: aspectMask: VkImageAspectFlags = 1 (VK_IMAGE_ASPECT_COLOR_BIT) baseMipLevel: uint32_t = 0 levelCount: uint32_t = 1 baseArrayLayer: uint32_t = 0 layerCount: uint32_t = 1 This fixes all the CTS dEQP-VK.memory.pipeline_barrier.transfer_dst tests here, not sure if this is a too large hammer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]> --- src/amd/vulkan/radv_cmd_buffer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index c4e8324..8c0bf8f 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2636,6 +2636,7 @@ void radv_CmdPipelineBarrier( break; case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT: case VK_ACCESS_TRANSFER_READ_BIT: + case VK_ACCESS_TRANSFER_WRITE_BIT: case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER | RADV_CMD_FLAG_INV_GLOBAL_L2; default: _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
