Module: Mesa Branch: master Commit: e6902be90079500cb421f7eb886cdcc49bb58a60 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6902be90079500cb421f7eb886cdcc49bb58a60
Author: Dave Airlie <[email protected]> Date: Thu Mar 9 08:26:13 2017 +1000 radv/ac: fixup texture coord to have right number of channels. Jason has patches to add validation to this area, this should fix radv shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]> --- src/amd/vulkan/radv_meta_bufimage.c | 6 +++--- src/amd/vulkan/radv_meta_resolve_cs.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_meta_bufimage.c b/src/amd/vulkan/radv_meta_bufimage.c index 9f67a68..4cdd070 100644 --- a/src/amd/vulkan/radv_meta_bufimage.c +++ b/src/amd/vulkan/radv_meta_bufimage.c @@ -85,7 +85,7 @@ build_nir_itob_compute_shader(struct radv_device *dev) tex->sampler_dim = GLSL_SAMPLER_DIM_2D; tex->op = nir_texop_txf; tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(img_coord); + tex->src[0].src = nir_src_for_ssa(nir_channels(&b, img_coord, 0x3)); tex->src[1].src_type = nir_tex_src_lod; tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); tex->dest_type = nir_type_float; @@ -288,7 +288,7 @@ build_nir_btoi_compute_shader(struct radv_device *dev) tex->sampler_dim = GLSL_SAMPLER_DIM_BUF; tex->op = nir_texop_txf; tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(buf_coord); + tex->src[0].src = nir_src_for_ssa(nir_channels(&b, buf_coord, 1)); tex->src[1].src_type = nir_tex_src_lod; tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); tex->dest_type = nir_type_float; @@ -477,7 +477,7 @@ build_nir_itoi_compute_shader(struct radv_device *dev) tex->sampler_dim = GLSL_SAMPLER_DIM_2D; tex->op = nir_texop_txf; tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(src_coord); + tex->src[0].src = nir_src_for_ssa(nir_channels(&b, src_coord, 3)); tex->src[1].src_type = nir_tex_src_lod; tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); tex->dest_type = nir_type_float; diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 3272d1f..dc0672e 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -82,7 +82,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, int sampl nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset"); nir_builder_instr_insert(&b, &dst_offset->instr); - nir_ssa_def *img_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa); + nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, global_id, &src_offset->dest.ssa), 0x3); /* do a txf_ms on each sample */ nir_ssa_def *tmp; _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
