Module: Mesa Branch: master Commit: a52ee32a9a49b48c51a80b8a35aa26bd583cabb7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a52ee32a9a49b48c51a80b8a35aa26bd583cabb7
Author: Jonas Kulla <[email protected]> Date: Mon Jun 19 19:46:23 2017 +0200 anv: Fix L3 cache programming on Bay Trail Valid values for URBAllocation start at 32, so substract that before programming the register. This was missed when porting from the GL driver. Cc: "17.1" <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> --- src/intel/vulkan/genX_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 59430a24eb..0216ea04a8 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -835,7 +835,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, anv_pack_struct(&l3cr2, GENX(L3CNTLREG2), .SLMEnable = has_slm, .URBLowBandwidth = urb_low_bw, - .URBAllocation = cfg->n[GEN_L3P_URB], + .URBAllocation = cfg->n[GEN_L3P_URB] - n0_urb, #if !GEN_IS_HASWELL .ALLAllocation = cfg->n[GEN_L3P_ALL], #endif _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
