Module: Mesa
Branch: master
Commit: 71e630753ebbee82e8f8709da5488296b2c070c8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=71e630753ebbee82e8f8709da5488296b2c070c8
Author: Roland Scheidegger <srol...@vmware.com>
Date: Wed Nov 22 03:11:33 2017 +0100
r600: set DX10_CLAMP for compute shader too
I really intended to set this for all shader stages by
3835009796166968750ff46cf209f6d4208cda86 but missed it for compute shaders
(because it's in a different source file...).
Reviewed-by: Dave Airlie <airl...@redhat.com>
---
src/gallium/drivers/r600/evergreen_compute.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index 6e87539cfe..48c4a9ca45 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -746,8 +746,9 @@ void evergreen_emit_cs_shader(struct r600_context *rctx,
radeon_compute_set_context_reg_seq(cs, R_0288D0_SQ_PGM_START_LS, 3);
radeon_emit(cs, va >> 8); /* R_0288D0_SQ_PGM_START_LS */
radeon_emit(cs, /* R_0288D4_SQ_PGM_RESOURCES_LS */
- S_0288D4_NUM_GPRS(ngpr)
- | S_0288D4_STACK_SIZE(nstack));
+ S_0288D4_NUM_GPRS(ngpr) |
+ S_0288D4_DX10_CLAMP(1) |
+ S_0288D4_STACK_SIZE(nstack));
radeon_emit(cs, 0); /* R_0288D8_SQ_PGM_RESOURCES_LS_2 */
radeon_emit(cs, PKT3C(PKT3_NOP, 0, 0));
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