Module: Mesa
Branch: master
Commit: aa8a2a867056a93467623efbca950b51e592e67d
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa8a2a867056a93467623efbca950b51e592e67d

Author: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Date:   Mon Dec  4 15:12:40 2017 +0000

drm-uapi: Update drm/i915 headers from drm-next

Taken from drm-next ca797d29cd63e7b71b4eea29aff3b1cefd1ecb59

Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antogno...@intel.com>

---

 include/drm-uapi/README     |  8 +++---
 include/drm-uapi/drm.h      | 41 ++++++++++++++++++++++++++
 include/drm-uapi/drm_mode.h | 70 +++++++++++++++++++++++++++++++++++++++++++--
 include/drm-uapi/i915_drm.h | 38 ++++++++++++++++++++++++
 4 files changed, 151 insertions(+), 6 deletions(-)

diff --git a/include/drm-uapi/README b/include/drm-uapi/README
index 27de91cad0..53dd711dad 100644
--- a/include/drm-uapi/README
+++ b/include/drm-uapi/README
@@ -13,9 +13,9 @@ $ make headers_install INSTALL_HDR_PATH=/path/to/install
 
 The last update was done at the following kernel commit :
 
-commit 7846b12fe0b5feab5446d892f41b5140c1419109
-Merge: 7ebdb0d d78acfe
+commit ca797d29cd63e7b71b4eea29aff3b1cefd1ecb59
+Merge: 2c1c55cb75a9 010d118c2061
 Author: Dave Airlie <airl...@redhat.com>
-Date:   Tue Aug 29 10:38:14 2017 +1000
+Date:   Mon Dec 4 09:40:35 2017 +1000
 
-    Merge branch 'drm-vmwgfx-next' of 
git://people.freedesktop.org/~syeh/repos_linux into drm-next
+    Merge tag 'drm-intel-next-2017-11-17-1' of 
git://anongit.freedesktop.org/drm/drm-intel into drm-next
diff --git a/include/drm-uapi/drm.h b/include/drm-uapi/drm.h
index 4737261ae3..f0bd91de0c 100644
--- a/include/drm-uapi/drm.h
+++ b/include/drm-uapi/drm.h
@@ -731,6 +731,28 @@ struct drm_syncobj_array {
        __u32 pad;
 };
 
+/* Query current scanout sequence number */
+struct drm_crtc_get_sequence {
+       __u32 crtc_id;          /* requested crtc_id */
+       __u32 active;           /* return: crtc output is active */
+       __u64 sequence;         /* return: most recent vblank sequence */
+       __s64 sequence_ns;      /* return: most recent time of first pixel out 
*/
+};
+
+/* Queue event to be delivered at specified sequence. Time stamp marks
+ * when the first pixel of the refresh cycle leaves the display engine
+ * for the display
+ */
+#define DRM_CRTC_SEQUENCE_RELATIVE             0x00000001      /* sequence is 
relative to current */
+#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS         0x00000002      /* Use next 
sequence if we've missed */
+
+struct drm_crtc_queue_sequence {
+       __u32 crtc_id;
+       __u32 flags;
+       __u64 sequence;         /* on input, target sequence. on output, actual 
sequence */
+       __u64 user_data;        /* user data passed to event */
+};
+
 #if defined(__cplusplus)
 }
 #endif
@@ -813,6 +835,9 @@ extern "C" {
 
 #define DRM_IOCTL_WAIT_VBLANK          DRM_IOWR(0x3a, union drm_wait_vblank)
 
+#define DRM_IOCTL_CRTC_GET_SEQUENCE    DRM_IOWR(0x3b, struct 
drm_crtc_get_sequence)
+#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE  DRM_IOWR(0x3c, struct 
drm_crtc_queue_sequence)
+
 #define DRM_IOCTL_UPDATE_DRAW          DRM_IOW(0x3f, struct drm_update_draw)
 
 #define DRM_IOCTL_MODE_GETRESOURCES    DRM_IOWR(0xA0, struct drm_mode_card_res)
@@ -857,6 +882,11 @@ extern "C" {
 #define DRM_IOCTL_SYNCOBJ_RESET                DRM_IOWR(0xC4, struct 
drm_syncobj_array)
 #define DRM_IOCTL_SYNCOBJ_SIGNAL       DRM_IOWR(0xC5, struct drm_syncobj_array)
 
+#define DRM_IOCTL_MODE_CREATE_LEASE    DRM_IOWR(0xC6, struct 
drm_mode_create_lease)
+#define DRM_IOCTL_MODE_LIST_LESSEES    DRM_IOWR(0xC7, struct 
drm_mode_list_lessees)
+#define DRM_IOCTL_MODE_GET_LEASE       DRM_IOWR(0xC8, struct 
drm_mode_get_lease)
+#define DRM_IOCTL_MODE_REVOKE_LEASE    DRM_IOWR(0xC9, struct 
drm_mode_revoke_lease)
+
 /**
  * Device specific ioctls should only be in their respective headers
  * The device specific ioctl range is from 0x40 to 0x9f.
@@ -887,6 +917,7 @@ struct drm_event {
 
 #define DRM_EVENT_VBLANK 0x01
 #define DRM_EVENT_FLIP_COMPLETE 0x02
+#define DRM_EVENT_CRTC_SEQUENCE        0x03
 
 struct drm_event_vblank {
        struct drm_event base;
@@ -897,6 +928,16 @@ struct drm_event_vblank {
        __u32 crtc_id; /* 0 on older kernels that do not support this */
 };
 
+/* Event delivered at sequence. Time stamp marks when the first pixel
+ * of the refresh cycle leaves the display engine for the display
+ */
+struct drm_event_crtc_sequence {
+       struct drm_event        base;
+       __u64                   user_data;
+       __s64                   time_ns;
+       __u64                   sequence;
+};
+
 /* typedef area */
 typedef struct drm_clip_rect drm_clip_rect_t;
 typedef struct drm_drawable_info drm_drawable_info_t;
diff --git a/include/drm-uapi/drm_mode.h b/include/drm-uapi/drm_mode.h
index 54fc38c3c3..5597a87154 100644
--- a/include/drm-uapi/drm_mode.h
+++ b/include/drm-uapi/drm_mode.h
@@ -749,9 +749,9 @@ struct drm_format_modifier {
         * If the number formats grew to 128, and formats 98-102 are
         * supported with the modifier:
         *
-        * 0x0000003c00000000 0000000000000000
+        * 0x0000007c00000000 0000000000000000
         *                ^
-        *                |__offset = 64, formats = 0x3c00000000
+        *                |__offset = 64, formats = 0x7c00000000
         *
         */
        __u64 formats;
@@ -782,6 +782,72 @@ struct drm_mode_destroy_blob {
        __u32 blob_id;
 };
 
+/**
+ * Lease mode resources, creating another drm_master.
+ */
+struct drm_mode_create_lease {
+       /** Pointer to array of object ids (__u32) */
+       __u64 object_ids;
+       /** Number of object ids */
+       __u32 object_count;
+       /** flags for new FD (O_CLOEXEC, etc) */
+       __u32 flags;
+
+       /** Return: unique identifier for lessee. */
+       __u32 lessee_id;
+       /** Return: file descriptor to new drm_master file */
+       __u32 fd;
+};
+
+/**
+ * List lesses from a drm_master
+ */
+struct drm_mode_list_lessees {
+       /** Number of lessees.
+        * On input, provides length of the array.
+        * On output, provides total number. No
+        * more than the input number will be written
+        * back, so two calls can be used to get
+        * the size and then the data.
+        */
+       __u32 count_lessees;
+       __u32 pad;
+
+       /** Pointer to lessees.
+        * pointer to __u64 array of lessee ids
+        */
+       __u64 lessees_ptr;
+};
+
+/**
+ * Get leased objects
+ */
+struct drm_mode_get_lease {
+       /** Number of leased objects.
+        * On input, provides length of the array.
+        * On output, provides total number. No
+        * more than the input number will be written
+        * back, so two calls can be used to get
+        * the size and then the data.
+        */
+       __u32 count_objects;
+       __u32 pad;
+
+       /** Pointer to objects.
+        * pointer to __u32 array of object ids
+        */
+       __u64 objects_ptr;
+};
+
+/**
+ * Revoke lease
+ */
+struct drm_mode_revoke_lease {
+       /** Unique ID of lessee
+        */
+       __u32 lessee_id;
+};
+
 #if defined(__cplusplus)
 }
 #endif
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 890df227ae..7f28eea403 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -86,6 +86,22 @@ enum i915_mocs_table_index {
        I915_MOCS_CACHED,
 };
 
+/*
+ * Different engines serve different roles, and there may be more than one
+ * engine serving each role. enum drm_i915_gem_engine_class provides a
+ * classification of the role of the engine, which may be used when requesting
+ * operations to be performed on a certain subset of engines, or for providing
+ * information about that group.
+ */
+enum drm_i915_gem_engine_class {
+       I915_ENGINE_CLASS_RENDER        = 0,
+       I915_ENGINE_CLASS_COPY          = 1,
+       I915_ENGINE_CLASS_VIDEO         = 2,
+       I915_ENGINE_CLASS_VIDEO_ENHANCE = 3,
+
+       I915_ENGINE_CLASS_INVALID       = -1
+};
+
 /* Each region is a minimum of 16k, and there are at most 255 of them.
  */
 #define I915_NR_TEX_REGIONS 255        /* table size 2k - maximum due to use
@@ -450,6 +466,27 @@ typedef struct drm_i915_irq_wait {
  */
 #define I915_PARAM_HAS_EXEC_FENCE_ARRAY  49
 
+/*
+ * Query whether every context (both per-file default and user created) is
+ * isolated (insofar as HW supports). If this parameter is not true, then
+ * freshly created contexts may inherit values from an existing context,
+ * rather than default HW values. If true, it also ensures (insofar as HW
+ * supports) that all state set by this context will not leak to any other
+ * context.
+ *
+ * As not every engine across every gen support contexts, the returned
+ * value reports the support of context isolation for individual engines by
+ * returning a bitmask of each engine class set to true if that class supports
+ * isolation.
+ */
+#define I915_PARAM_HAS_CONTEXT_ISOLATION 50
+
+/* Frequency of the command streamer timestamps given by the *_TIMESTAMP
+ * registers. This used to be fixed per platform but from CNL onwards, this
+ * might vary depending on the parts.
+ */
+#define I915_PARAM_CS_TIMESTAMP_FREQUENCY 51
+
 typedef struct drm_i915_getparam {
        __s32 param;
        /*
@@ -839,6 +876,7 @@ struct drm_i915_gem_exec_fence {
 
 #define I915_EXEC_FENCE_WAIT            (1<<0)
 #define I915_EXEC_FENCE_SIGNAL          (1<<1)
+#define __I915_EXEC_FENCE_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_SIGNAL << 1))
        __u32 flags;
 };
 

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