Module: Mesa Branch: master Commit: dd119a4263452a36e9d4938a39ddbc8d6bf298f7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd119a4263452a36e9d4938a39ddbc8d6bf298f7
Author: Timothy Arceri <[email protected]> Date: Tue Dec 12 13:49:41 2017 +1100 st/glsl_to_nir: skip forced array splitting for tcs nir_lower_io_to_temporaries() does not support tcs so we cannot assume there are no indirects here. Also the radeonsi backend (the only backend to support tess) has support for tcs indirects so there is no need to lower them anyway. Reviewed-by: Nicolai Hähnle <[email protected]> --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index 36adf55cd4..7357eebae0 100644 --- a/src/mesa/state_tracker/st_glsl_to_nir.cpp +++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp @@ -642,7 +642,8 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, NIR_PASS_V(nir, nir_split_var_copies); NIR_PASS_V(nir, nir_lower_var_copies); - NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects); + if (nir->info.stage != MESA_SHADER_TESS_CTRL) + NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects); if (nir->info.stage == MESA_SHADER_VERTEX) { /* Needs special handling so drvloc matches the vbo state: */ _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
