Module: Mesa Branch: master Commit: a93fd7b41e3e3c8c2c35d45dc171a87cdc45060a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a93fd7b41e3e3c8c2c35d45dc171a87cdc45060a
Author: Eric Anholt <[email protected]> Date: Thu Dec 28 14:41:47 2017 -0800 broadcom/vc5: Try to fix up compressed texture load/store. We were trying to load/store the logical width/height number of compressed blocks. As long as the textures were large, single-level, and the load/store at (0,0), it kind of worked. --- src/gallium/drivers/vc5/vc5_resource.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c index 0e4aaa1924..3b1a56e472 100644 --- a/src/gallium/drivers/vc5/vc5_resource.c +++ b/src/gallium/drivers/vc5/vc5_resource.c @@ -238,6 +238,14 @@ vc5_resource_transfer_map(struct pipe_context *pctx, *pptrans = ptrans; + /* Our load/store routines work on entire compressed blocks. */ + ptrans->box.x /= util_format_get_blockwidth(format); + ptrans->box.y /= util_format_get_blockheight(format); + ptrans->box.width = DIV_ROUND_UP(ptrans->box.width, + util_format_get_blockwidth(format)); + ptrans->box.height = DIV_ROUND_UP(ptrans->box.height, + util_format_get_blockheight(format)); + struct vc5_resource_slice *slice = &rsc->slices[level]; if (rsc->tiled) { /* No direct mappings of tiled, since we need to manually @@ -266,8 +274,8 @@ vc5_resource_transfer_map(struct pipe_context *pctx, ptrans->layer_stride = ptrans->stride; return buf + slice->offset + - ptrans->box.y / util_format_get_blockheight(format) * ptrans->stride + - ptrans->box.x / util_format_get_blockwidth(format) * rsc->cpp + + ptrans->box.y * ptrans->stride + + ptrans->box.x * rsc->cpp + ptrans->box.z * rsc->cube_map_stride; } @@ -332,6 +340,8 @@ vc5_setup_slices(struct vc5_resource *rsc) uint32_t utile_h = vc5_utile_height(rsc->cpp); uint32_t uif_block_w = utile_w * 2; uint32_t uif_block_h = utile_h * 2; + uint32_t block_width = util_format_get_blockwidth(prsc->format); + uint32_t block_height = util_format_get_blockheight(prsc->format); bool msaa = prsc->nr_samples > 1; /* MSAA textures/renderbuffers are always laid out as single-level * UIF. @@ -355,6 +365,9 @@ vc5_setup_slices(struct vc5_resource *rsc) level_height *= 2; } + level_width = DIV_ROUND_UP(level_width, block_width); + level_height = DIV_ROUND_UP(level_height, block_height); + if (!rsc->tiled) { slice->tiling = VC5_TILING_RASTER; if (prsc->target == PIPE_TEXTURE_1D) _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
