Module: Mesa Branch: master Commit: f2c9f13ec2fdab99f5aa7f32845ee94dd1942fe9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2c9f13ec2fdab99f5aa7f32845ee94dd1942fe9
Author: Bas Nieuwenhuizen <[email protected]> Date: Thu Jan 4 01:45:15 2018 +0100 radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT. These are just shaders reads, so we need to invalidate L1. Fixes: 6dbb0eaccc "radv: handle subpass cache flushes" Reviewed-by: Samuel Pitoiset <[email protected]> --- src/amd/vulkan/radv_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 6dc80acef0..0faf8030b4 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2014,11 +2014,11 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer, switch ((VkAccessFlagBits)(1 << b)) { case VK_ACCESS_INDIRECT_COMMAND_READ_BIT: case VK_ACCESS_INDEX_READ_BIT: - case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: break; case VK_ACCESS_UNIFORM_READ_BIT: flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1; break; + case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: case VK_ACCESS_SHADER_READ_BIT: case VK_ACCESS_TRANSFER_READ_BIT: case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
