Module: Mesa
Branch: master
Commit: 7aa008d1d7d2b7f9bcaf299546a8d23f59d79268
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aa008d1d7d2b7f9bcaf299546a8d23f59d79268

Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date:   Fri Feb  2 19:04:57 2018 +0100

radv: enable lowering of fpow to fexp2 and flog2

There is no fpow in hardware, so it's always lowered somewhere,
but it appears that lowering at NIR level is better. Figured while
comparing compute shaders between RadeonSI and RADV.

Polaris10:
Totals from affected shaders:
SGPRS: 18936 -> 18904 (-0.17 %)
VGPRS: 12240 -> 12220 (-0.16 %)
Spilled SGPRs: 2809 -> 2809 (0.00 %)
Code Size: 718116 -> 719848 (0.24 %) bytes
Max Waves: 1409 -> 1410 (0.07 %)

Vega10:
Totals from affected shaders:
SGPRS: 18392 -> 18392 (0.00 %)
VGPRS: 12008 -> 11920 (-0.73 %)
Spilled SGPRs: 3001 -> 2981 (-0.67 %)
Code Size: 777444 -> 778788 (0.17 %) bytes
Max Waves: 1503 -> 1504 (0.07 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_shader.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index d9b8e209a9..171802eede 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -67,6 +67,7 @@ static const struct nir_shader_compiler_options nir_options = 
{
        .lower_extract_byte = true,
        .lower_extract_word = true,
        .lower_ffma = true,
+       .lower_fpow = true,
        .vs_inputs_dual_locations = true,
        .max_unroll_iterations = 32
 };

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