Module: Mesa Branch: master Commit: 9f6a28eb27ca059cbadfa5e277bfe4509a426615 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f6a28eb27ca059cbadfa5e277bfe4509a426615
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue Apr 10 14:09:04 2018 +0200 radv: add shader BOs to the list at pipeline bind time Otherwise, the shader BOs are not added to the list on SI because prefetching isn't supported. Calling radv_cs_add_buffer() in the prefetch codepath was a bad idea. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105952 Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2") Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Tested-by: Turo Lamminen <t...@alternativegames.net> Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> --- src/amd/vulkan/radv_cmd_buffer.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 4e89969016..3b1d6aedc8 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -625,8 +625,6 @@ static void radv_emit_shader_prefetch(struct radv_cmd_buffer *cmd_buffer, struct radv_shader_variant *shader) { - struct radeon_winsys *ws = cmd_buffer->device->ws; - struct radeon_winsys_cs *cs = cmd_buffer->cs; uint64_t va; if (!shader) @@ -634,7 +632,6 @@ radv_emit_shader_prefetch(struct radv_cmd_buffer *cmd_buffer, va = radv_buffer_get_va(shader->bo) + shader->bo_offset; - radv_cs_add_buffer(ws, cs, shader->bo, 8); si_cp_dma_prefetch(cmd_buffer, va, shader->code_size); } @@ -702,6 +699,18 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer) radeon_emit_array(cmd_buffer->cs, pipeline->cs.buf, pipeline->cs.cdw); + for (unsigned i = 0; i < MESA_SHADER_COMPUTE; i++) { + if (!pipeline->shaders[i]) + continue; + + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, + pipeline->shaders[i]->bo, 8); + } + + if (radv_pipeline_has_gs(pipeline)) + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, + pipeline->gs_copy_shader->bo, 8); + if (unlikely(cmd_buffer->device->trace_bo)) radv_save_pipeline(cmd_buffer, pipeline, RING_GFX); @@ -2280,6 +2289,9 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) MAX2(cmd_buffer->compute_scratch_size_needed, pipeline->max_waves * pipeline->scratch_bytes_per_wave); + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, + pipeline->shaders[MESA_SHADER_COMPUTE]->bo, 8); + if (unlikely(cmd_buffer->device->trace_bo)) radv_save_pipeline(cmd_buffer, pipeline, RING_COMPUTE); } _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
