URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b7358fe4376aecee0c29ea622f88f9ef07e6b11
Author: Marek Olšák <[email protected]>
Date: Fri Apr 13 18:09:11 2018 -0400
radeonsi: increase the number of compiler threads depending on the CPU
The compiler queue was limited to 3 threads, so shader-db running
on a 16-thread CPU would have a bottleneck on the 3-thread queue.
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f0eaaf6d96bf627b6594ea2045ba1c0268dbac2
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 19:55:10 2018 -0400
radeonsi: avoid a crash in gallivm_dispose_target_library_info
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e75fc8d03396ea47506cc044cb1c11a7352ea283
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 19:23:55 2018 -0400
radeonsi: move data_layout into si_compiler
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=797d673c9a8c2d0a392f80b3c2190606ba8a6c83
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 19:13:37 2018 -0400
radeonsi: move passmgr into si_compiler
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1823ff661b016defe93baa0038e5fd6ca8522c4
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 18:43:54 2018 -0400
radeonsi: move target_library_info into si_compiler
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a94f15aa769cc090817c5dce2b98fa91d7e2110
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 18:36:58 2018 -0400
radeonsi: use si_compiler::triple in si_llvm_optimize_module
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43f0a10051337c08d4c74e4c205dc75336d00ef9
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 18:35:45 2018 -0400
radeonsi: add triple into si_compiler
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=87eb597758a1fe126a712675e8f15c4395c57143
Author: Marek Olšák <[email protected]>
Date: Mon Apr 9 18:26:05 2018 -0400
radeonsi: add struct si_compiler containing LLVMTargetMachineRef
It will contain more variables.
Reviewed-by: Timothy Arceri <[email protected]>
Tested-by: Benedikt Schemmer <ben at besd.de>
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=788d66553af418d3a195b58c3debd87a40f8174c
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:53:25 2018 -0400
radeonsi: rename r600_texture::resource to buffer
r600_resource could be renamed to si_buffer.
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fadfc01c6f1600de89e8cd74f2ba78f503b5e6b
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:52:05 2018 -0400
radeonsi: use r600_resource() typecast helper
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3160ee876aa37ddf3f9de42a3db3f986eff57000
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:20:53 2018 -0400
radeonsi: remove unused atom parameter from si_atom::emit
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de344209ad6825600a0d5bd7156a95cc8093e4a0
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:12:24 2018 -0400
radeonsi: inline 2 trivial state structures
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e39547509618920451b881d178be2775ab6b3b23
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:07:29 2018 -0400
radeonsi: remove function si_init_atom
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccebcba893cb54f36fec41f548071b08b9f7ba16
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 21:03:51 2018 -0400
radeonsi: remove si_atom::id
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=639b673fc3b8754dc85fd686dab6ac26738dc3d9
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 20:54:02 2018 -0400
radeonsi: don't use an indirect table for state atoms
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9054799b39e41e5aae6dde6bc6bebbd23abdd558
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 20:26:14 2018 -0400
radeonsi: rename r600_atom -> si_atom
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8abbbb172ea69453ac5bbb6a97c3497eda4ca53
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 20:20:39 2018 -0400
radeonsi: remove r600_pipe_common.h
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d19120da851c0d3f97376c733d674f7c8ab0457
Author: Marek Olšák <[email protected]>
Date: Fri Apr 13 17:15:06 2018 -0400
radeonsi/gfx9: workaround for INTERP with indirect indexing
and clean up the conditions.
Reviewed-by: Nicolai Hähnle <[email protected]>
Cc: 18.0 18.1 <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d69b485f557d8d438edf7e99ad4b15bb2594061
Author: Marek Olšák <[email protected]>
Date: Wed Apr 11 21:21:28 2018 -0400
radeonsi: rewrite DCC format compatibility checking code
It might be better to use a slow compressed clear when clearing to 1.
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c732d069b3a4a5fefb353d01d17834ce2c548ae6
Author: Marek Olšák <[email protected]>
Date: Wed Apr 4 21:43:28 2018 -0400
radeonsi: implement DCC fast clear swizzle constraints more accurately
Reduce swizzle constraints to the ALPHA_IS_ON_MSB constraint and the clear
value of 1.
This significantly changes the DCC fast clear code, and fixes fast clear
for RGB formats without alpha.
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ef423f72038e35ef914e081876ddabcd05b93a9
Author: Marek Olšák <[email protected]>
Date: Wed Apr 11 11:30:58 2018 -0400
radeonsi: rename variables and document stuff around DCC fast clear
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cc2e0cc6b47bd5efbf2af266405060785085e6b
Author: Marek Olšák <[email protected]>
Date: Sat Apr 7 23:40:26 2018 -0400
radeonsi: fully enable 2x DCC MSAA for array and non-array textures
The clear code is exactly the same as for 1 sample buffers -
just clear the whole thing.
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca33d961a4034ebf4e8e93be32ce3dc9d18570ab
Author: Marek Olšák <[email protected]>
Date: Sun Apr 8 00:19:50 2018 -0400
radeonsi: enable fast color clear for level 0 of mipmapped textures on <= VI
GFX9 is more complicated and needs a compute shader that we should just
copy from amdvlk.
Reviewed-by: Nicolai Hähnle <[email protected]>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=174e11c3f5440ad1e22354816fe2ccc5b7a970e9
Author: Marek Olšák <[email protected]>
Date: Mon Apr 16 16:34:56 2018 -0400
ac/surface: handle DCC subresource fast clear restriction on VI
v2: require the previous level to be clearable for determining whether
the last unaligned level is clearable
Reviewed-by: Nicolai Hähnle <[email protected]>
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