Module: Mesa Branch: master Commit: cf440d85db6d0ec3d2d5467cfa3d0462e4267261 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf440d85db6d0ec3d2d5467cfa3d0462e4267261
Author: Chris Wilson <[email protected]> Date: Sat May 5 19:36:25 2018 +0100 intel/genxml: Fix a few invalid field widths A couple of typos found by inspecting field.end - field.start, revealed a few wide integers declared as bool and some that ended before they started. Cc: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> --- src/intel/genxml/gen4.xml | 12 ++++++------ src/intel/genxml/gen45.xml | 12 ++++++------ src/intel/genxml/gen5.xml | 12 ++++++------ src/intel/genxml/gen6.xml | 6 +++--- src/intel/genxml/gen7.xml | 6 +++--- src/intel/genxml/gen75.xml | 8 ++++---- 6 files changed, 28 insertions(+), 28 deletions(-) diff --git a/src/intel/genxml/gen4.xml b/src/intel/genxml/gen4.xml index 6f513c5833..cd50a1012b 100644 --- a/src/intel/genxml/gen4.xml +++ b/src/intel/genxml/gen4.xml @@ -961,12 +961,12 @@ <field name="CLIP Unit URB Reallocation Request" start="10" end="10" type="bool"/> <field name="GS Unit URB Reallocation Request" start="9" end="9" type="bool"/> <field name="VS Unit URB Reallocation Request" start="8" end="8" type="bool"/> - <field name="CLIP Fence" start="52" end="61" type="bool"/> - <field name="GS Fence" start="42" end="51" type="bool"/> - <field name="VS Fence" start="32" end="41" type="bool"/> - <field name="CS Fence" start="84" end="94" type="bool"/> - <field name="VFE Fence" start="74" end="83" type="bool"/> - <field name="SF Fence" start="64" end="73" type="bool"/> + <field name="CLIP Fence" start="52" end="61" type="uint"/> + <field name="GS Fence" start="42" end="51" type="uint"/> + <field name="VS Fence" start="32" end="41" type="uint"/> + <field name="CS Fence" start="84" end="94" type="uint"/> + <field name="VFE Fence" start="74" end="83" type="uint"/> + <field name="SF Fence" start="64" end="73" type="uint"/> </instruction> <instruction name="XY_COLOR_BLT" bias="2" length="6"> diff --git a/src/intel/genxml/gen45.xml b/src/intel/genxml/gen45.xml index fbd57a00c5..4d2c1534d3 100644 --- a/src/intel/genxml/gen45.xml +++ b/src/intel/genxml/gen45.xml @@ -994,12 +994,12 @@ <field name="CLIP Unit URB Reallocation Request" start="10" end="10" type="bool"/> <field name="GS Unit URB Reallocation Request" start="9" end="9" type="bool"/> <field name="VS Unit URB Reallocation Request" start="8" end="8" type="bool"/> - <field name="CLIP Fence" start="52" end="61" type="bool"/> - <field name="GS Fence" start="42" end="51" type="bool"/> - <field name="VS Fence" start="32" end="41" type="bool"/> - <field name="CS Fence" start="84" end="94" type="bool"/> - <field name="VFE Fence" start="74" end="83" type="bool"/> - <field name="SF Fence" start="64" end="73" type="bool"/> + <field name="CLIP Fence" start="52" end="61" type="uint"/> + <field name="GS Fence" start="42" end="51" type="uint"/> + <field name="VS Fence" start="32" end="41" type="uint"/> + <field name="CS Fence" start="84" end="94" type="uint"/> + <field name="VFE Fence" start="74" end="83" type="uint"/> + <field name="SF Fence" start="64" end="73" type="uint"/> </instruction> <instruction name="XY_COLOR_BLT" bias="2" length="6"> diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml index 5c93ecdda3..5bb5a2c331 100644 --- a/src/intel/genxml/gen5.xml +++ b/src/intel/genxml/gen5.xml @@ -1086,12 +1086,12 @@ i <field name="CLIP Unit URB Reallocation Request" start="10" end="10" type="bool"/> <field name="GS Unit URB Reallocation Request" start="9" end="9" type="bool"/> <field name="VS Unit URB Reallocation Request" start="8" end="8" type="bool"/> - <field name="CLIP Fence" start="52" end="61" type="bool"/> - <field name="GS Fence" start="42" end="51" type="bool"/> - <field name="VS Fence" start="32" end="41" type="bool"/> - <field name="CS Fence" start="84" end="94" type="bool"/> - <field name="VFE Fence" start="74" end="83" type="bool"/> - <field name="SF Fence" start="64" end="73" type="bool"/> + <field name="CLIP Fence" start="52" end="61" type="uint"/> + <field name="GS Fence" start="42" end="51" type="uint"/> + <field name="VS Fence" start="32" end="41" type="uint"/> + <field name="CS Fence" start="84" end="94" type="uint"/> + <field name="VFE Fence" start="74" end="83" type="uint"/> + <field name="SF Fence" start="64" end="73" type="uint"/> </instruction> <instruction name="XY_COLOR_BLT" bias="2" length="6"> diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml index 0493221bd7..f258065eba 100644 --- a/src/intel/genxml/gen6.xml +++ b/src/intel/genxml/gen6.xml @@ -1888,7 +1888,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -1904,7 +1904,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -1920,7 +1920,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml index baf42a7d32..895f5d232b 100644 --- a/src/intel/genxml/gen7.xml +++ b/src/intel/genxml/gen7.xml @@ -2537,7 +2537,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -2553,7 +2553,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -2569,7 +2569,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index 7b635b22da..fe59446d83 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -3021,7 +3021,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -3037,7 +3037,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -3053,7 +3053,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> @@ -3069,7 +3069,7 @@ <value name="Invalid and Unloaded PD fault" value="3"/> </field> <field name= "SRCID of Fault" start="3" end="10" type="uint"/> - <field name="GTTSEL" start="11" end="1" type="uint"> + <field name="GTTSEL" start="11" end="11" type="uint"> <value name="PPGTT" value="0"/> <value name="GGTT" value="1"/> </field> _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
