Module: Mesa
Branch: 18.1
Commit: 1def4eaa5c29a7b25d626a37d55f1541273cf336
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1def4eaa5c29a7b25d626a37d55f1541273cf336
Author: Marek Olšák <marek.ol...@amd.com>
Date: Tue May 1 20:16:19 2018 -0400
radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVM
Fixes: 6d19120da85 "radeonsi/gfx9: workaround for INTERP with indirect indexing"
Cc: 18.1 <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>
(cherry picked from commit 597b9e881083533b987dbcbb8f679ca1eefff974)
---
src/gallium/drivers/radeonsi/si_get.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_get.c
b/src/gallium/drivers/radeonsi/si_get.c
index 04ab0f46bb..6bfbc4d0c4 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -484,6 +484,15 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
!sscreen->llvm_has_working_vgpr_indexing)
return 0;
+ /* Doing indirect indexing on GFX9 with LLVM 6.0 hangs.
+ * This means we don't support INTERP instructions with
+ * indirect indexing on inputs.
+ */
+ if (shader == PIPE_SHADER_FRAGMENT &&
+ !sscreen->llvm_has_working_vgpr_indexing &&
+ HAVE_LLVM < 0x0700)
+ return 0;
+
/* TCS and TES load inputs directly from LDS or offchip
* memory, so indirect indexing is always supported.
* PS has to support indirect indexing, because we can't
_______________________________________________
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit
