Module: Mesa
Branch: master
Commit: 4d08c1e7d15f7d2c0a406cf1c79314511778b38f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d08c1e7d15f7d2c0a406cf1c79314511778b38f
Author: Eric Engestrom <eric.engest...@intel.com>
Date: Fri Jun 15 17:58:17 2018 +0100
radv: fix bitwise check
Fixes: 922cd38172b8a2bc286bd "radv: implement out-of-order rasterization when
it's safe on VI+"
Signed-off-by: Eric Engestrom <eric.engest...@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/amd/vulkan/radv_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index ccbcbbadd5..113622bb0c 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -622,7 +622,7 @@ radv_blend_check_commutativity(struct radv_blend_state
*blend,
(1u << VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA);
if (dst == VK_BLEND_FACTOR_ONE &&
- (src_allowed && (1u << src))) {
+ (src_allowed & (1u << src))) {
/* Addition is commutative, but floating point addition isn't
* associative: subtle changes can be introduced via different
* rounding. Be conservative, only enable for min and max.
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