Module: Mesa Branch: refs/keep-around/07cb1373a23042de6904e918419bfa3963695795 Commit: 07cb1373a23042de6904e918419bfa3963695795 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07cb1373a23042de6904e918419bfa3963695795
Author: Samuel Pitoiset <[email protected]> Date: Mon Jun 25 13:34:10 2018 +0200 radv: fix HTILE metadata initialization in presence of subpass clears If the driver ends up by performing a slow depthstencil clear, the HTILE metadata won't be initialized correctly. This fixes random VM faults on Polaris while running CTS with Bas's runner. This doesn't seem to regress performance. CC: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> --- src/amd/vulkan/radv_cmd_buffer.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8bd41bc41a..0388e4b6e0 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3987,14 +3987,7 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe if (!radv_image_has_htile(image)) return; - if (dst_layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL && - (pending_clears & vk_format_aspects(image->vk_format)) == vk_format_aspects(image->vk_format) && - cmd_buffer->state.render_area.offset.x == 0 && cmd_buffer->state.render_area.offset.y == 0 && - cmd_buffer->state.render_area.extent.width == image->info.width && - cmd_buffer->state.render_area.extent.height == image->info.height) { - /* The clear will initialize htile. */ - return; - } else if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED && + if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED && radv_layout_has_htile(image, dst_layout, dst_queue_mask)) { /* TODO: merge with the clear if applicable */ radv_initialize_htile(cmd_buffer, image, range, 0); _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
