Module: Mesa
Branch: master
Commit: 3df201e3e843b0c4fe810360f7e8b81de9c6a92a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3df201e3e843b0c4fe810360f7e8b81de9c6a92a
Author: Nanley Chery <nanley.g.ch...@intel.com>
Date: Wed May 23 15:50:14 2018 -0700
i965/miptree: Drop an if case from retile_as_linear
Drop an if statement whose predicate never evaluates to true. row_pitch
belongs to a surface with non-linear tiling. According to
isl_calc_tiled_min_row_pitch, the pitch is a multiple of the tile width.
By looking at isl_tiling_get_info, we see that non-linear tilings have
widths greater than or equal to 128B.
Cc: <mesa-sta...@lists.freedesktop.org>
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 4a61cee08b..0552e092e8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -519,10 +519,6 @@ need_to_retile_as_linear(struct brw_context *brw, unsigned
row_pitch,
if (tiling == ISL_TILING_LINEAR)
return false;
- /* If the width is much smaller than a tile, don't bother tiling. */
- if (row_pitch < 64)
- return true;
-
if (ALIGN(row_pitch, 512) >= 32768) {
perf_debug("row pitch %u too large to blit, falling back to untiled",
row_pitch);
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