Module: Mesa Branch: master Commit: 760211b77c7aabc9264542f18e42f366b0fef33f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=760211b77c7aabc9264542f18e42f366b0fef33f
Author: Bas Nieuwenhuizen <[email protected]> Date: Sat Jul 14 14:28:20 2018 +0200 radv: Fix number of samples used for binning. Used the wrong register ... CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> --- src/amd/vulkan/radv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 1f01d2ff4d..4c794d9515 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2443,7 +2443,7 @@ radv_compute_bin_size(struct radv_pipeline *pipeline, const VkGraphicsPipelineCr pipeline->device->physical_device->rad_info.max_se); unsigned log_num_se = util_logbase2_ceil(pipeline->device->physical_device->rad_info.max_se); - unsigned total_samples = 1u << G_028BE0_MSAA_NUM_SAMPLES(pipeline->graphics.ms.pa_sc_mode_cntl_1); + unsigned total_samples = 1u << G_028BE0_MSAA_NUM_SAMPLES(pipeline->graphics.ms.pa_sc_aa_config); unsigned ps_iter_samples = 1u << G_028804_PS_ITER_SAMPLES(pipeline->graphics.ms.db_eqaa); unsigned effective_samples = total_samples; unsigned color_bytes_per_pixel = 0; _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
