Module: Mesa Branch: staging/18.1 Commit: aeb8b00661a930181ede5515bac3fc24536e8e43 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aeb8b00661a930181ede5515bac3fc24536e8e43
Author: Marek Olšák <[email protected]> Date: Tue Aug 28 15:49:31 2018 -0400 radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI VI uses addrlib so it's unaffected. Cc: 18.1 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit a1b9a00f82db79e59e4a743d52bb62c998584690) Conflicts resolved by Dylan Conflicts: src/gallium/drivers/radeonsi/si_texture.c --- src/gallium/drivers/radeonsi/si_texture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 0a2939bdd1..af606d79a7 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1019,8 +1019,8 @@ static void si_texture_get_htile_size(struct si_screen *sscreen, return; } - width = align(rtex->resource.b.b.width0, cl_width * 8); - height = align(rtex->resource.b.b.height0, cl_height * 8); + width = align(rtex->surface.u.legacy.level[0].nblk_x, cl_width * 8); + height = align(rtex->surface.u.legacy.level[0].nblk_y, cl_height * 8); slice_elements = (width * height) / (8 * 8); slice_bytes = slice_elements * 4; _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
