Module: Mesa
Branch: staging/18.3
Commit: 2045d5e689122e90106c76486968496910cbb537
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2045d5e689122e90106c76486968496910cbb537

Author: Samuel Pitoiset <[email protected]>
Date:   Fri Feb 15 18:02:52 2019 +0100

radv: write the alpha channel of MRT0 when alpha coverage is enabled

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597
Cc: 18.3 19.0 <[email protected]>
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
(cherry picked from commit 0d8f09629377da9cf48ab4315574d69fdef5369d)

---

 src/amd/vulkan/radv_pipeline.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 86d78e87b65..c9f617e7594 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -511,6 +511,13 @@ radv_pipeline_compute_spi_color_formats(struct 
radv_pipeline *pipeline,
 
                if (subpass->color_attachments[i].attachment == 
VK_ATTACHMENT_UNUSED) {
                        cf = V_028714_SPI_SHADER_ZERO;
+
+                       if (blend->need_src_alpha & (1 << i)) {
+                               /* Write the alpha channel of MRT0 when alpha 
coverage is
+                                * enabled because the depth attachment needs 
it.
+                                */
+                               col_format |= V_028714_SPI_SHADER_32_ABGR;
+                       }
                } else {
                        struct radv_render_pass_attachment *attachment = 
pass->attachments + subpass->color_attachments[i].attachment;
                        bool blend_enable =

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