Module: Mesa
Branch: staging/19.2
Commit: 5378782434fe20df1c6cd033ac6deed19d71f4b9
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5378782434fe20df1c6cd033ac6deed19d71f4b9

Author: Tapani Pälli <[email protected]>
Date:   Fri Oct 11 09:42:21 2019 +0300

i965: setup sized internalformat for MESA_FORMAT_R10G10B10A2_UNORM

Commit d2b60e433e5 introduced restrictions (as per GLES spec) on the
internal format. We need to setup a sized format for the texture image
so framebuffers created with that are considered complete.

This change fixes following Android CTS test in AHardwareBufferNativeTests
category:

   SingleLayer_ColorTest_GpuColorOutputAndSampledImage_R10G10B10A2_UNORM

Signed-off-by: Tapani Pälli <[email protected]>
Fixes: d2b60e433e5 ("mesa/main: R10G10B10_(A2) formats are not color renderable 
in ES")
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 412badd059de6f55cbcab10a55d052986a74b4cd)

---

 src/mesa/drivers/dri/i965/intel_tex_image.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c 
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index ccaa9ef7474..95c44a0313a 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -633,9 +633,17 @@ intel_image_target_texture_2d(struct gl_context *ctx, 
GLenum target,
    struct intel_texture_object *intel_texobj = intel_texture_object(texObj);
    intel_texobj->planar_format = image->planar_format;
 
-   const GLenum internal_format =
+   GLenum internal_format =
       image->internal_format != 0 ?
       image->internal_format : _mesa_get_format_base_format(mt->format);
+
+   /* Setup a sized internal format for MESA_FORMAT_R10G10B10[X2|A2]_UNORM. */
+   if (brw->mesa_format_supports_render[image->format]) {
+      if (image->format == MESA_FORMAT_R10G10B10A2_UNORM ||
+          image->format == MESA_FORMAT_R10G10B10X2_UNORM)
+         internal_format = GL_RGB10_A2;
+   }
+
    intel_set_texture_image_mt(brw, texImage, internal_format, mt->format, mt);
    intel_miptree_release(&mt);
 }

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